From: Marek Olšák Date: Thu, 22 Oct 2015 20:55:19 +0000 (+0200) Subject: radeonsi: add debug flags that disable DCC and DCC fast clear X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3aebc596b339b1b787ed0dfc27793263d48b2819;p=mesa.git radeonsi: add debug flags that disable DCC and DCC fast clear For debugging, bug reports, etc. This is not in the radeonsi directory, but it is about radeonsi. Reviewed-by: Nicolai Hähnle --- diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c index 4ce0c6a1994..0ad36849645 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.c +++ b/src/gallium/drivers/radeon/r600_pipe_common.c @@ -360,6 +360,8 @@ static const struct debug_named_value common_debug_options[] = { { "precompile", DBG_PRECOMPILE, "Compile one shader variant at shader creation." }, { "nowc", DBG_NO_WC, "Disable GTT write combining" }, { "check_vm", DBG_CHECK_VM, "Check VM faults and dump debug info." }, + { "nodcc", DBG_NO_DCC, "Disable DCC." }, + { "nodccclear", DBG_NO_DCC_CLEAR, "Disable DCC fast clear." }, DEBUG_NAMED_VALUE_END /* must be last */ }; diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h index f21a0b3a188..c300c0b3332 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.h +++ b/src/gallium/drivers/radeon/r600_pipe_common.h @@ -99,6 +99,8 @@ #define DBG_INFO (1llu << 40) #define DBG_NO_WC (1llu << 41) #define DBG_CHECK_VM (1llu << 42) +#define DBG_NO_DCC (1llu << 43) +#define DBG_NO_DCC_CLEAR (1llu << 44) #define R600_MAP_BUFFER_ALIGNMENT 64 diff --git a/src/gallium/drivers/radeon/r600_texture.c b/src/gallium/drivers/radeon/r600_texture.c index 40075ae7031..789c66fd169 100644 --- a/src/gallium/drivers/radeon/r600_texture.c +++ b/src/gallium/drivers/radeon/r600_texture.c @@ -486,6 +486,9 @@ static void r600_texture_alloc_cmask_separate(struct r600_common_screen *rscreen static void vi_texture_alloc_dcc_separate(struct r600_common_screen *rscreen, struct r600_texture *rtex) { + if (rscreen->debug_flags & DBG_NO_DCC) + return; + rtex->dcc_buffer = (struct r600_resource *) r600_aligned_buffer_create(&rscreen->b, PIPE_BIND_CUSTOM, PIPE_USAGE_DEFAULT, rtex->surface.dcc_size, rtex->surface.dcc_alignment); @@ -1371,6 +1374,9 @@ void evergreen_do_fast_color_clear(struct r600_common_context *rctx, uint32_t reset_value; bool clear_words_needed; + if (rctx->screen->debug_flags & DBG_NO_DCC_CLEAR) + continue; + vi_get_fast_clear_parameters(fb->cbufs[i]->format, color, &reset_value, &clear_words_needed); rctx->clear_buffer(&rctx->b, &tex->dcc_buffer->b.b,