From: Tapani Pälli Date: Wed, 13 Mar 2019 10:13:09 +0000 (+0200) Subject: i965: remove scaling factors from P010, P012 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3b41175c22e14775656e13d11ca84cad83837b04;p=mesa.git i965: remove scaling factors from P010, P012 Patch removes scaling factors introduced in 2a2e69f975b but leaves option to use scaling in place as it could be useful with other upcoming YUV formats. We did this scaling because ffmpeg was shifting channel bits down, however it seems this is not the right place as compositor wants to flip same buffers directly to display as well and therefore bitshifting needs to be done by the client when receiving frame from ffmpeg. Now P0x formats are treated the same, e.g. P010 is same as P016 but with lower 6 bits set to zeros. Fixes: 2a2e69f975b "i965: add P0x formats and propagate required scaling factors" Signed-off-by: Tapani Pälli Reviewed-by: Lionel Landwerlin --- diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c index 76c85047240..754e323caba 100644 --- a/src/mesa/drivers/dri/i965/intel_screen.c +++ b/src/mesa/drivers/dri/i965/intel_screen.c @@ -289,11 +289,11 @@ static const struct intel_image_format intel_image_formats[] = { { __DRI_IMAGE_FOURCC_P010, __DRI_IMAGE_COMPONENTS_Y_UV, 2, { { 0, 0, 0, __DRI_IMAGE_FORMAT_R16, 2 }, - { 1, 1, 1, __DRI_IMAGE_FORMAT_GR1616, 4 } } , 65535.0f/1023.0f }, + { 1, 1, 1, __DRI_IMAGE_FORMAT_GR1616, 4 } } }, { __DRI_IMAGE_FOURCC_P012, __DRI_IMAGE_COMPONENTS_Y_UV, 2, { { 0, 0, 0, __DRI_IMAGE_FORMAT_R16, 2 }, - { 1, 1, 1, __DRI_IMAGE_FORMAT_GR1616, 4 } } , 65535.0f/4095.0f }, + { 1, 1, 1, __DRI_IMAGE_FORMAT_GR1616, 4 } } }, { __DRI_IMAGE_FOURCC_P016, __DRI_IMAGE_COMPONENTS_Y_UV, 2, { { 0, 0, 0, __DRI_IMAGE_FORMAT_R16, 2 },