From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Wed, 19 Jan 2022 17:46:13 +0000 (+0000)
Subject: whoops forgot to enable fast-reg read in DMI
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3b57b3c950afc74e9db6bff7cb1659ef6668ab7e;p=soc.git

whoops forgot to enable fast-reg read in DMI
---

diff --git a/src/soc/debug/dmi.py b/src/soc/debug/dmi.py
index cda675ac..e8349182 100644
--- a/src/soc/debug/dmi.py
+++ b/src/soc/debug/dmi.py
@@ -256,6 +256,7 @@ class CoreDebug(Elaboratable):
                             continue
                         with m.If(dmi.din == 32+i):
                             sync += fast_index.eq(i)
+                            sync += fast_en.eq(1)
 
                 # Log address
                 with m.Elif(dmi.addr_i == DBGCore.LOG_ADDR):