From: Gabe Black Date: Wed, 8 Mar 2006 13:09:27 +0000 (-0500) Subject: Working towards compiling SPARC_SE X-Git-Tag: m5_2.0_beta1~87^2~26^2~1 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3b7d756907c8dd0f7c6387953f7b156330fcc47d;p=gem5.git Working towards compiling SPARC_SE arch/alpha/isa_traits.hh: Changed the enums to const ints, and got rid of a few unnecessary constants. arch/sparc/isa_traits.hh: Got rid of the enums, and added in some missing constants. --HG-- extra : convert_revision : ee47890af9d8c67300b31d8e0dda1d580bd21479 --- diff --git a/arch/alpha/isa_traits.hh b/arch/alpha/isa_traits.hh index be6d5111d..9db16a1bf 100644 --- a/arch/alpha/isa_traits.hh +++ b/arch/alpha/isa_traits.hh @@ -60,52 +60,45 @@ namespace AlphaISA typedef uint64_t ExtMachInst; typedef uint8_t RegIndex; - enum { - MemoryEnd = 0xffffffffffffffffULL, - - NumIntArchRegs = 32, - NumPALShadowRegs = 8, - NumFloatArchRegs = 32, - // @todo: Figure out what this number really should be. - NumMiscArchRegs = 32, - - MaxRegsOfAnyType = 32, - // Static instruction parameters - MaxInstSrcRegs = 3, - MaxInstDestRegs = 2, - - // semantically meaningful register indices - ZeroReg = 31, // architecturally meaningful - // the rest of these depend on the ABI - StackPointerReg = 30, - GlobalPointerReg = 29, - ProcedureValueReg = 27, - ReturnAddressReg = 26, - ReturnValueReg = 0, - FramePointerReg = 15, - ArgumentReg0 = 16, - ArgumentReg1 = 17, - ArgumentReg2 = 18, - ArgumentReg3 = 19, - ArgumentReg4 = 20, - ArgumentReg5 = 21, - - LogVMPageSize = 13, // 8K bytes - VMPageSize = (1 << LogVMPageSize), - - BranchPredAddrShiftAmt = 2, // instructions are 4-byte aligned - - WordBytes = 4, - HalfwordBytes = 2, - ByteBytes = 1, - DepNA = 0, - }; - - enum { - NumIntRegs = NumIntArchRegs + NumPALShadowRegs, - NumFloatRegs = NumFloatArchRegs, - NumMiscRegs = NumMiscArchRegs - }; + const int NumIntArchRegs = 32; + const int NumPALShadowRegs = 8; + const int NumFloatArchRegs = 32; + // @todo: Figure out what this number really should be. + const int NumMiscArchRegs = 32; + + // Static instruction parameters + const int MaxInstSrcRegs = 3; + const int MaxInstDestRegs = 2; + + // semantically meaningful register indices + const int ZeroReg = 31; // architecturally meaningful + // the rest of these depend on the ABI + const int StackPointerReg = 30; + const int GlobalPointerReg = 29; + const int ProcedureValueReg = 27; + const int ReturnAddressReg = 26; + const int ReturnValueReg = 0; + const int FramePointerReg = 15; + const int ArgumentReg0 = 16; + const int ArgumentReg1 = 17; + const int ArgumentReg2 = 18; + const int ArgumentReg3 = 19; + const int ArgumentReg4 = 20; + const int ArgumentReg5 = 21; + + const int LogVMPageSize = 13; // 8K bytes + const int VMPageSize = (1 << LogVMPageSize); + + const int BranchPredAddrShiftAmt = 2; // instructions are 4-byte aligned + + const int WordBytes = 4; + const int HalfwordBytes = 2; + const int ByteBytes = 1; + + + const int NumIntRegs = NumIntArchRegs + NumPALShadowRegs; + const int NumFloatRegs = NumFloatArchRegs; + const int NumMiscRegs = NumMiscArchRegs; // These enumerate all the registers for dependence tracking. enum DependenceTags { @@ -149,9 +142,7 @@ extern const int reg_redir[NumIntRegs]; #include "arch/alpha/isa_fullsys_traits.hh" #else - enum { - NumInternalProcRegs = 0 - }; + const int NumInternalProcRegs = 0; #endif // control register file contents @@ -192,14 +183,10 @@ extern const int reg_redir[NumIntRegs]; friend class RegFile; }; - enum { - TotalNumRegs = - NumIntRegs + NumFloatRegs + NumMiscRegs + NumInternalProcRegs - }; + const int TotalNumRegs = NumIntRegs + NumFloatRegs + + NumMiscRegs + NumInternalProcRegs; - enum { - TotalDataRegs = NumIntRegs + NumFloatRegs - }; + const int TotalDataRegs = NumIntRegs + NumFloatRegs; typedef union { IntReg intreg; diff --git a/arch/sparc/isa_traits.hh b/arch/sparc/isa_traits.hh index 73daae8a9..c592a05ed 100644 --- a/arch/sparc/isa_traits.hh +++ b/arch/sparc/isa_traits.hh @@ -60,29 +60,36 @@ namespace SparcISA typedef uint64_t ExtMachInst; typedef uint8_t RegIndex; - enum - { - MemoryEnd = 0xffffffffffffffffULL, - - NumFloatRegs = 32, - NumMiscRegs = 32, - - MaxRegsOfAnyType = 32, - // Static instruction parameters - MaxInstSrcRegs = 3, - MaxInstDestRegs = 2, - - // Maximum trap level - MaxTL = 4, - - // semantically meaningful register indices - ZeroReg = 0, // architecturally meaningful - // the rest of these depend on the ABI - //8K. This value is implmentation specific, and should probably - //be somewhere else. - LogVMPageSize = 13, - VMPageSize = (1 << LogVMPageSize) - }; + const int NumFloatRegs = 32; + const int NumMiscRegs = 32; + + const int MaxRegsOfAnyType = 32; + const int // Static instruction parameters + const int MaxInstSrcRegs = 3; + const int MaxInstDestRegs = 2; + + const int // Maximum trap level + const int MaxTL = 4; + const int + const int // semantically meaningful register indices + const int ZeroReg = 0; // architecturally meaningful + const int // the rest of these depend on the ABI + const int StackPointerReg = 14; + const int ReturnAddressReg = 31; + const int ReturnValueReg = 24; + const int FramePointerReg = 30; + const int ArgumentReg0 = 24; + const int ArgumentReg1 = 25; + const int ArgumentReg2 = 26; + const int ArgumentReg3 = 27; + const int ArgumentReg4 = 28; + const int ArgumentReg5 = 29; + const int + const int //8K. This value is implmentation specific; and should probably + const int //be somewhere else. + const int LogVMPageSize = 13; + const int VMPageSize = (1 << LogVMPageSize); + typedef uint64_t IntReg; class IntRegFile