From: Brian Paul Date: Thu, 1 Jan 2009 19:03:07 +0000 (-0700) Subject: i965: comments, clean-ups, re-order some functions X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3b891a502b030f2ce8cd7a1aba93df11595f5c95;p=mesa.git i965: comments, clean-ups, re-order some functions --- diff --git a/src/mesa/drivers/dri/i965/brw_eu.h b/src/mesa/drivers/dri/i965/brw_eu.h index 49b422ee2ff..31e9ceb42ed 100644 --- a/src/mesa/drivers/dri/i965/brw_eu.h +++ b/src/mesa/drivers/dri/i965/brw_eu.h @@ -129,17 +129,28 @@ static INLINE int type_sz( GLuint type ) } } +/** + * Construct a brw_reg. + * \param file one of the BRW_x_REGISTER_FILE values + * \param nr register number/index + * \param subnr register sub number + * \param type one of BRW_REGISTER_TYPE_x + * \param vstride one of BRW_VERTICAL_STRIDE_x + * \param width one of BRW_WIDTH_x + * \param hstride one of BRW_HORIZONTAL_STRIDE_x + * \param swizzle one of BRW_SWIZZLE_x + * \param writemask WRITEMASK_X/Y/Z/W bitfield + */ static INLINE struct brw_reg brw_reg( GLuint file, - GLuint nr, - GLuint subnr, - GLuint type, - GLuint vstride, - GLuint width, - GLuint hstride, - GLuint swizzle, - GLuint writemask) -{ - + GLuint nr, + GLuint subnr, + GLuint type, + GLuint vstride, + GLuint width, + GLuint hstride, + GLuint swizzle, + GLuint writemask ) +{ struct brw_reg reg; reg.type = type; reg.file = file; @@ -166,6 +177,7 @@ static INLINE struct brw_reg brw_reg( GLuint file, return reg; } +/** Construct float[16] register */ static INLINE struct brw_reg brw_vec16_reg( GLuint file, GLuint nr, GLuint subnr ) @@ -181,6 +193,7 @@ static INLINE struct brw_reg brw_vec16_reg( GLuint file, WRITEMASK_XYZW); } +/** Construct float[8] register */ static INLINE struct brw_reg brw_vec8_reg( GLuint file, GLuint nr, GLuint subnr ) @@ -196,7 +209,7 @@ static INLINE struct brw_reg brw_vec8_reg( GLuint file, WRITEMASK_XYZW); } - +/** Construct float[4] register */ static INLINE struct brw_reg brw_vec4_reg( GLuint file, GLuint nr, GLuint subnr ) @@ -212,7 +225,7 @@ static INLINE struct brw_reg brw_vec4_reg( GLuint file, WRITEMASK_XYZW); } - +/** Construct float[2] register */ static INLINE struct brw_reg brw_vec2_reg( GLuint file, GLuint nr, GLuint subnr ) @@ -228,6 +241,7 @@ static INLINE struct brw_reg brw_vec2_reg( GLuint file, WRITEMASK_XY); } +/** Construct float[1] register */ static INLINE struct brw_reg brw_vec1_reg( GLuint file, GLuint nr, GLuint subnr ) @@ -277,6 +291,7 @@ static INLINE struct brw_reg byte_offset( struct brw_reg reg, } +/** Construct unsigned word[16] register */ static INLINE struct brw_reg brw_uw16_reg( GLuint file, GLuint nr, GLuint subnr ) @@ -284,6 +299,7 @@ static INLINE struct brw_reg brw_uw16_reg( GLuint file, return suboffset(retype(brw_vec16_reg(file, nr, 0), BRW_REGISTER_TYPE_UW), subnr); } +/** Construct unsigned word[8] register */ static INLINE struct brw_reg brw_uw8_reg( GLuint file, GLuint nr, GLuint subnr ) @@ -291,6 +307,7 @@ static INLINE struct brw_reg brw_uw8_reg( GLuint file, return suboffset(retype(brw_vec8_reg(file, nr, 0), BRW_REGISTER_TYPE_UW), subnr); } +/** Construct unsigned word[1] register */ static INLINE struct brw_reg brw_uw1_reg( GLuint file, GLuint nr, GLuint subnr ) @@ -311,6 +328,7 @@ static INLINE struct brw_reg brw_imm_reg( GLuint type ) 0); } +/** Construct float immediate register */ static INLINE struct brw_reg brw_imm_f( GLfloat f ) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_F); @@ -318,6 +336,7 @@ static INLINE struct brw_reg brw_imm_f( GLfloat f ) return imm; } +/** Construct integer immediate register */ static INLINE struct brw_reg brw_imm_d( GLint d ) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_D); @@ -325,6 +344,7 @@ static INLINE struct brw_reg brw_imm_d( GLint d ) return imm; } +/** Construct uint immediate register */ static INLINE struct brw_reg brw_imm_ud( GLuint ud ) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_UD); @@ -332,6 +352,7 @@ static INLINE struct brw_reg brw_imm_ud( GLuint ud ) return imm; } +/** Construct ushort immediate register */ static INLINE struct brw_reg brw_imm_uw( GLushort uw ) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_UW); @@ -339,6 +360,7 @@ static INLINE struct brw_reg brw_imm_uw( GLushort uw ) return imm; } +/** Construct short immediate register */ static INLINE struct brw_reg brw_imm_w( GLshort w ) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_W); @@ -350,8 +372,7 @@ static INLINE struct brw_reg brw_imm_w( GLshort w ) * numbers alias with _V and _VF below: */ -/* Vector of eight signed half-byte values: - */ +/** Construct vector of eight signed half-byte values */ static INLINE struct brw_reg brw_imm_v( GLuint v ) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_V); @@ -362,8 +383,7 @@ static INLINE struct brw_reg brw_imm_v( GLuint v ) return imm; } -/* Vector of four 8-bit float values: - */ +/** Construct vector of four 8-bit float values */ static INLINE struct brw_reg brw_imm_vf( GLuint v ) { struct brw_reg imm = brw_imm_reg(BRW_REGISTER_TYPE_VF); @@ -400,44 +420,43 @@ static INLINE struct brw_reg brw_address( struct brw_reg reg ) return brw_imm_uw(reg.nr * REG_SIZE + reg.subnr); } - -static INLINE struct brw_reg brw_vec1_grf( GLuint nr, - GLuint subnr ) +/** Construct float[1] general-purpose register */ +static INLINE struct brw_reg brw_vec1_grf( GLuint nr, GLuint subnr ) { return brw_vec1_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); } -static INLINE struct brw_reg brw_vec8_grf( GLuint nr, - GLuint subnr ) +/** Construct float[2] general-purpose register */ +static INLINE struct brw_reg brw_vec2_grf( GLuint nr, GLuint subnr ) { - return brw_vec8_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); + return brw_vec2_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); } -static INLINE struct brw_reg brw_vec4_grf( GLuint nr, - GLuint subnr ) +/** Construct float[4] general-purpose register */ +static INLINE struct brw_reg brw_vec4_grf( GLuint nr, GLuint subnr ) { return brw_vec4_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); } - -static INLINE struct brw_reg brw_vec2_grf( GLuint nr, - GLuint subnr ) +/** Construct float[8] general-purpose register */ +static INLINE struct brw_reg brw_vec8_grf( GLuint nr, GLuint subnr ) { - return brw_vec2_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); + return brw_vec8_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); } -static INLINE struct brw_reg brw_uw8_grf( GLuint nr, - GLuint subnr ) + +static INLINE struct brw_reg brw_uw8_grf( GLuint nr, GLuint subnr ) { return brw_uw8_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); } -static INLINE struct brw_reg brw_uw16_grf( GLuint nr, - GLuint subnr ) +static INLINE struct brw_reg brw_uw16_grf( GLuint nr, GLuint subnr ) { return brw_uw16_reg(BRW_GENERAL_REGISTER_FILE, nr, subnr); } + +/** Construct null register (usually used for setting condition codes) */ static INLINE struct brw_reg brw_null_reg( void ) { return brw_vec8_reg(BRW_ARCHITECTURE_REGISTER_FILE, @@ -524,13 +543,13 @@ static INLINE struct brw_reg stride( struct brw_reg reg, GLuint width, GLuint hstride ) { - reg.vstride = cvt(vstride); reg.width = cvt(width) - 1; reg.hstride = cvt(hstride); return reg; } + static INLINE struct brw_reg vec16( struct brw_reg reg ) { return stride(reg, 16,16,1); @@ -556,6 +575,7 @@ static INLINE struct brw_reg vec1( struct brw_reg reg ) return stride(reg, 0,1,0); } + static INLINE struct brw_reg get_element( struct brw_reg reg, GLuint elt ) { return vec1(suboffset(reg, elt)); @@ -687,7 +707,7 @@ static INLINE struct brw_indirect brw_indirect( GLuint addr_subnr, GLint offset static INLINE struct brw_instruction *current_insn( struct brw_compile *p) { - return &p->store[p->nr_insn]; + return &p->store[p->nr_insn]; } void brw_pop_insn_state( struct brw_compile *p );