From: Yoshinori Sato <ysato@users.sourceforge.jp>
Date: Thu, 22 Sep 2022 11:40:43 +0000 (+0100)
Subject: opcodes: SH fix bank register disassemble.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3b8e069a3691adc1a93ca7f4bcb5e8e687317108;p=binutils-gdb.git

opcodes: SH fix bank register disassemble.

	* sh-dis.c (print_insn_sh): Enforce bit7 of LDC Rm,Rn_BANK and STC
	Rm_BANK,Rn is always 1.
---

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 1a23be86d70..bbd3544b83d 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2022-09-22  Yoshinori Sato  <ysato@users.sourceforge.jp>
+
+	* sh-dis.c (print_insn_sh): Enforce bit7 of LDC Rm,Rn_BANK and STC
+	Rm_BANK,Rn is always 1.
+
 2022-07-21  Peter Bergner  <bergner@linux.ibm.com>
 
 	* ppc-opc.c (XACC_MASK, XX3ACC_MASK): New defines.
diff --git a/opcodes/sh-dis.c b/opcodes/sh-dis.c
index 0e46cb6f4d9..49dbc23d920 100644
--- a/opcodes/sh-dis.c
+++ b/opcodes/sh-dis.c
@@ -645,6 +645,8 @@ print_insn_sh (bfd_vma memaddr, struct disassemble_info *info)
 	      rm = (nibs[n] & 0x3);
 	      break;
 	    case REG_B:
+	      if (!(nibs[n] & 0x08)) /* Must always be 1.  */
+		goto fail;
 	      rb = nibs[n] & 0x07;
 	      break;
 	    case SDT_REG_N: