From: lkcl Date: Tue, 25 Feb 2020 10:34:11 +0000 (+0000) Subject: (no commit message) X-Git-Tag: convert-csv-opcode-to-binary~3311 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3b8ff0b3d0553747ce2c2c43c71e72e4138c8850;p=libreriscv.git --- diff --git a/3d_gpu/tutorial.mdwn b/3d_gpu/tutorial.mdwn index 5d45c174a..350196376 100644 --- a/3d_gpu/tutorial.mdwn +++ b/3d_gpu/tutorial.mdwn @@ -58,6 +58,19 @@ Yes you really do need to know this because those "gates" cost both power, space you also want to look up the concept of a FSM (Finite State Machine) and the difference between a Mealy and a Moore FSM. +## NDAs... + +These are a nuisance. There are around 4 levels of NDAs to bust through: +Full chip designs, peripherals and other third party components, Cell +Libraries, and Foundries. Often, the Foundries supply their own Standard Cell Libraries (see above). + +Sometimes you want to design something not under NDA (as we do), but +in order to do so you still need to know the "shape" of the Cells. +Occasionally, then, the licensee of those Cells will allow you to use +"phantoms", which are the same shape and have the same connections. +The official Industry term for these is "phantom views". See + for discussion. + # nmigen Once you understand gates and python, nmigen starts to make sense.