From: Luke Kenneth Casson Leighton Date: Sun, 14 Apr 2019 11:40:04 +0000 (+0100) Subject: update comments X-Git-Tag: div_pipeline~2255 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3bc1cd35a95773489d33d6c574c300a3158dcbf3;p=soc.git update comments --- diff --git a/TLB/src/ariane/tlb.py b/TLB/src/ariane/tlb.py index 0437a25c..e9f28c99 100644 --- a/TLB/src/ariane/tlb.py +++ b/TLB/src/ariane/tlb.py @@ -169,7 +169,7 @@ module tlb #( # replace_en[2] = &plru_tree[~4, 1,~0]; #plru_tree[0,1,4]=={0,1,0} # replace_en[1] = &plru_tree[ 3,~1,~0]; #plru_tree[0,1,3]=={0,0,1} # replace_en[0] = &plru_tree[~3,~1,~0]; #plru_tree[0,1,3]=={0,0,0} - # For each entry traverse the tree. If every tree-node matches, + # For each entry traverse the tree. If every tree-node matches # the corresponding bit of the entry's index, this is # the next entry to replace. for i in range(TLB_ENTRIES): @@ -180,13 +180,13 @@ module tlb #( shift = LOG_TLB - lvl; new_idx = (i >> (shift-1)) & 1; plru = plru_tree[idx_base + (i>>shift)] + # en &= plru_tree_q[idx_base + (i>>shift)] == new_idx; if new_idx: en.append(~plru) # yes inverted (using bool()) else: en.append(plru) # yes inverted (using bool()) - # this is equivalent to plru0 & plru1 & plru2 ... - # bool() is an *OR*, so invert individual items, OR, then invert, - # and it becomes an AND of the concatenated list of bits + # boolean logic manipluation: + # plur0 & plru1 & plur2 == ~(~plru0 | ~plru1 | ~plru2) m.d.sync += replace_en[i].eq(~Cat(*en).bool()) #--------------