From: Tom Stellard <thomas.stellard@amd.com>
Date: Thu, 19 Apr 2012 15:47:08 +0000 (-0400)
Subject: r600g/llvm: Only emit an instruction's explicit operands
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3c0f521cbfb551bf69cc14c606dcdd20c0529589;p=mesa.git

r600g/llvm: Only emit an instruction's explicit operands
---

diff --git a/src/gallium/drivers/radeon/R600CodeEmitter.cpp b/src/gallium/drivers/radeon/R600CodeEmitter.cpp
index 4d9ca4fab12..2367713500c 100644
--- a/src/gallium/drivers/radeon/R600CodeEmitter.cpp
+++ b/src/gallium/drivers/radeon/R600CodeEmitter.cpp
@@ -285,7 +285,7 @@ bool R600CodeEmitter::runOnMachineFunction(MachineFunction &MF) {
 void R600CodeEmitter::emitALUInstr(MachineInstr &MI)
 {
 
-  unsigned numOperands = MI.getNumOperands();
+  unsigned numOperands = MI.getNumExplicitOperands();
 
    /* Some instructions are just place holder instructions that represent
     * operations that the GPU does automatically.  They should be ignored. */
@@ -351,7 +351,7 @@ void R600CodeEmitter::emitSrc(const MachineOperand & MO)
     emitTwoBytes(getHWReg(reg));
     if (reg == AMDIL::ALU_LITERAL_X) {
       const MachineInstr * parent = MO.getParent();
-      unsigned immOpIndex = parent->getNumOperands() - 1;
+      unsigned immOpIndex = parent->getNumExplicitOperands() - 1;
       MachineOperand immOp = parent->getOperand(immOpIndex);
       if (immOp.isFPImm()) {
         value = immOp.getFPImm()->getValueAPF().bitcastToAPInt().getZExtValue();