From: Paul Berry Date: Wed, 16 Oct 2013 19:27:37 +0000 (-0700) Subject: i965/gs: If a DUAL_OBJECT gs would spill, fall back to DUAL_INSTANCED. X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3c2feb1969db110523093740ace594b5c9d75a25;p=mesa.git i965/gs: If a DUAL_OBJECT gs would spill, fall back to DUAL_INSTANCED. This is similar to what we do for 16-wide vs 8-wide fragment shaders. First we try compiling the geometry shader in DUAL_OBJECT mode. If we can't do that without spilling, we fall back on DUAL_INSTANCED mode, which should require less spilling (since it uses an interleaved layout of payload registers). In an ideal world we'd fall back to SINGLE mode, which would allow us to interleave general-purpose registers too (resulting in even less likelihood of spilling). But at the moment, the vec4 generator and visitor classes don't have the infrastructure to interleave general purpose registers, so DUAL_INSTANCED is the best we can do. As a side benefit this paves the way for implementing instanced geometry shaders (which are incompatible with DUAL_OBJECT mode). Since most geometry shaders used in piglit testing are small, DUAL_INSTANCED mode won't get exercised very much in a normal piglit run. To force DUAL_INSTANCED mode to be used for all geometry shaders, set INTEL_DEBUG=nodualobj. Reviewed-by: Eric Anholt --- diff --git a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp index b135f616ae1..adbb1cf0945 100644 --- a/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp +++ b/src/mesa/drivers/dri/i965/brw_vec4_gs_visitor.cpp @@ -550,8 +550,34 @@ brw_gs_emit(struct brw_context *brw, printf("\n\n"); } - /* Assume the geometry shader will use DUAL_OBJECT dispatch for now. */ - c->prog_data.dual_instanced_dispatch = false; + /* Compile the geometry shader in DUAL_OBJECT dispatch mode, if we can do + * so without spilling. + */ + if (likely(!(INTEL_DEBUG & DEBUG_NO_DUAL_OBJECT_GS))) { + c->prog_data.dual_instanced_dispatch = false; + + vec4_gs_visitor v(brw, c, prog, shader, mem_ctx, true /* no_spills */); + if (v.run()) { + vec4_generator g(brw, prog, &c->gp->program.Base, &c->prog_data.base, + mem_ctx, INTEL_DEBUG & DEBUG_GS); + const unsigned *generated = + g.generate_assembly(&v.instructions, final_assembly_size); + + return generated; + } + } + + /* Either we failed to compile in DUAL_OBJECT mode (probably because it + * would have required spilling) or DUAL_OBJECT mode is disabled. So fall + * back to DUAL_INSTANCED mode, which consumes fewer registers. + * + * FIXME: In an ideal world we'd fall back to SINGLE mode, which would + * allow us to interleave general purpose registers (resulting in even less + * likelihood of spilling). But at the moment, the vec4 generator and + * visitor classes don't have the infrastructure to interleave general + * purpose registers, so DUAL_INSTANCED is the best we can do. + */ + c->prog_data.dual_instanced_dispatch = true; vec4_gs_visitor v(brw, c, prog, shader, mem_ctx, false /* no_spills */); if (!v.run()) { diff --git a/src/mesa/drivers/dri/i965/intel_debug.c b/src/mesa/drivers/dri/i965/intel_debug.c index 03abdfa8612..b3e29353c4c 100644 --- a/src/mesa/drivers/dri/i965/intel_debug.c +++ b/src/mesa/drivers/dri/i965/intel_debug.c @@ -64,6 +64,7 @@ static const struct dri_debug_control debug_control[] = { { "shader_time", DEBUG_SHADER_TIME }, { "no16", DEBUG_NO16 }, { "blorp", DEBUG_BLORP }, + { "nodualobj", DEBUG_NO_DUAL_OBJECT_GS }, { NULL, 0 } }; diff --git a/src/mesa/drivers/dri/i965/intel_debug.h b/src/mesa/drivers/dri/i965/intel_debug.h index 486a8d650ca..718d95b1da5 100644 --- a/src/mesa/drivers/dri/i965/intel_debug.h +++ b/src/mesa/drivers/dri/i965/intel_debug.h @@ -60,6 +60,7 @@ extern int INTEL_DEBUG; #define DEBUG_BLORP 0x10000000 #define DEBUG_NO16 0x20000000 #define DEBUG_VUE 0x40000000 +#define DEBUG_NO_DUAL_OBJECT_GS 0x80000000 #ifdef HAVE_ANDROID_PLATFORM #define LOG_TAG "INTEL-MESA"