From: tvijlbrief@8f4aa443232130439ed134e0d8e213b8cec69547 <tvijlbrief@web>
Date: Sun, 7 Jun 2020 10:55:25 +0000 (+0100)
Subject: change kernel refs to proper links
X-Git-Tag: convert-csv-opcode-to-binary~2536
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3c370ed1867c678ae8ec3dd660c90362a83b1b2f;p=libreriscv.git

change kernel refs to proper links
---

diff --git a/openpower.mdwn b/openpower.mdwn
index 5e534f619..e174aaeef 100644
--- a/openpower.mdwn
+++ b/openpower.mdwn
@@ -166,7 +166,7 @@ Requirements are to have one instruction in each subpage which resets all the wa
 Dual ISA, RV userspace only. Requires PowerISA to be able to context-switch RV registers and CSRs.
 
 the exception entry point:
-https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/powerpc/kernel/exceptions-64s.S?h=v5.4-rc5#n409
+<https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/powerpc/kernel/exceptions-64s.S?h=v5.4-rc5#n409>
 
 the rest of the context switch code is in a different file:
-https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/powerpc/kernel/entry_64.S?h=v5.4-rc5#n589
+<https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/powerpc/kernel/entry_64.S?h=v5.4-rc5#n589>