From: Gabe Black <gblack@eecs.umich.edu>
Date: Mon, 13 Oct 2008 06:29:10 +0000 (-0700)
Subject: X86: Set the delayed commit flag in x86 microops appropriately.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3c4567f2a65e0809d84d85a3fd82a294a1b0cb96;p=gem5.git

X86: Set the delayed commit flag in x86 microops appropriately.
---

diff --git a/src/arch/x86/isa/macroop.isa b/src/arch/x86/isa/macroop.isa
index b851a92c7..7d94dd95c 100644
--- a/src/arch/x86/isa/macroop.isa
+++ b/src/arch/x86/isa/macroop.isa
@@ -220,11 +220,11 @@ let {{
             allocMicroops = ''
             micropc = 0
             for op in self.microops:
+                isLast = (micropc == numMicroops - 1)
                 allocMicroops += \
                     "microops[%d] = %s;\n" % \
-                    (micropc, op.getAllocator(True, False,
-                                              micropc == 0,
-                                              micropc == numMicroops - 1))
+                    (micropc, op.getAllocator(True, not isLast,
+                                              micropc == 0, isLast))
                 micropc += 1
             iop = InstObjParams(self.name, self.name, "Macroop",
                                 {"code" : "", "num_microops" : numMicroops,
diff --git a/src/arch/x86/isa/microops/base.isa b/src/arch/x86/isa/microops/base.isa
index 057d237ad..2b73cf563 100644
--- a/src/arch/x86/isa/microops/base.isa
+++ b/src/arch/x86/isa/microops/base.isa
@@ -118,7 +118,7 @@ let {{
         def getGeneratorDef(self, micropc):
             return self.generatorTemplate % \
                 (self.className, micropc, \
-                 self.getAllocator(True, False, False, False))
+                 self.getAllocator(True, True, False, False))
 
         def getGenerator(self, micropc):
             return self.generatorNameTemplate % (self.className, micropc)
diff --git a/src/arch/x86/isa/microops/seqop.isa b/src/arch/x86/isa/microops/seqop.isa
index d3c7bf096..f03094f66 100644
--- a/src/arch/x86/isa/microops/seqop.isa
+++ b/src/arch/x86/isa/microops/seqop.isa
@@ -195,6 +195,7 @@ let {{
         def getAllocator(self, *microFlags):
             (is_micro, is_delayed, is_first, is_last) = microFlags
             is_last = False
+            is_delayed = True
             microFlags = (is_micro, is_delayed, is_first, is_last)
             return super(Br, self).getAllocator(*microFlags)
 
@@ -214,6 +215,7 @@ let {{
         def getAllocator(self, *microFlags):
             (is_micro, is_delayed, is_first, is_last) = microFlags
             is_last = True
+            is_delayed = False
             microFlags = (is_micro, is_delayed, is_first, is_last)
             return super(Eret, self).getAllocator(*microFlags)