From: Nick Clifton <nickc@redhat.com>
Date: Tue, 7 Jul 2020 08:37:38 +0000 (+0100)
Subject: Fix recent failures in the ARM assembler testsuite due to the correction of a spellin... 
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3c6e74ce51d9439c2697cfec508ce885ddae8f21;p=binutils-gdb.git

Fix recent failures in the ARM assembler testsuite due to the correction of a spelling mistake.

	* testsuite/gas/arm/cde-missing-fp.l: Fix spelling mistake in
	expected output.
---

diff --git a/gas/ChangeLog b/gas/ChangeLog
index f7a66b07f59..64c58e0ecd1 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2020-07-07  Nick Clifton  <nickc@redhat.com>
+
+	* testsuite/gas/arm/cde-missing-fp.l: Fix spelling mistake in
+	expected output.
+
 2020-07-06  Jan Beulich  <jbeulich@suse.com>
 
 	* testsuite/gas/i386/x86-64-avx512bw-wig1.d,
diff --git a/gas/testsuite/gas/arm/cde-missing-fp.l b/gas/testsuite/gas/arm/cde-missing-fp.l
index 2fbfa9dd27b..0dae24b2153 100644
--- a/gas/testsuite/gas/arm/cde-missing-fp.l
+++ b/gas/testsuite/gas/arm/cde-missing-fp.l
@@ -54,95 +54,95 @@
 [^ :]+:[0-9]+: Error: selected processor does not support `vptt\.i8 eq,q0,q0' in Thumb mode
 [^ :]+:[0-9]+: Error: bad instruction `vcx3t p0,q0,q0,q0,#0'
 [^ :]+:[0-9]+: Error: bad instruction `vcx3at p0,q0,q0,q0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,s0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,s0,#1920'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,s0,#64'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,s0,#63'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p7,s0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,s1,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,s30,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,d0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,d0,#1920'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,d0,#64'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,d0,#63'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p7,d0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1 p0,d15,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,s0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,s0,#1920'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,s0,#64'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,s0,#63'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p7,s0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,s1,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,s30,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,d0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,d0,#1920'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,d0,#64'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,d0,#63'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p7,d0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx1a p0,d15,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,s0,s0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,s0,s0,#60'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,s0,s0,#2'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,s0,s0,#1'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p7,s0,s0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,s1,s0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,s30,s0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,s0,s1,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,s0,s30,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,d0,d0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,d0,d0,#60'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,d0,d0,#2'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,d0,d0,#1'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p7,d0,d0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,d15,d0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2 p0,d0,d15,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,s0,s0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,s0,s0,#60'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,s0,s0,#2'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,s0,s0,#1'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p7,s0,s0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,s1,s0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,s30,s0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,s0,s1,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,s0,s30,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,d0,d0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,d0,d0,#60'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,d0,d0,#2'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,d0,d0,#1'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p7,d0,d0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,d15,d0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx2a p0,d0,d15,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,s0,s0,s0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,s0,s0,s0,#6'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,s0,s0,s0,#1'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p7,s0,s0,s0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,s1,s0,s0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,s30,s0,s0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,s0,s1,s0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,s0,s30,s0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,s0,s0,s1,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,s0,s0,s30,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,d0,d0,d0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,d0,d0,d0,#6'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,d0,d0,d0,#1'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p7,d0,d0,d0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,d15,d0,d0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,d0,d15,d0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3 p0,d0,d0,d15,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,s0,s0,s0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,s0,s0,s0,#6'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,s0,s0,s0,#1'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p7,s0,s0,s0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,s1,s0,s0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,s30,s0,s0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,s0,s1,s0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,s0,s30,s0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,s0,s0,s1,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,s0,s0,s30,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,d0,d0,d0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,d0,d0,d0,#6'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,d0,d0,d0,#1'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p7,d0,d0,d0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,d15,d0,d0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,d0,d15,d0,#0'
-[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point etension\. -- `vcx3a p0,d0,d0,d15,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,s0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,s0,#1920'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,s0,#64'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,s0,#63'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p7,s0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,s1,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,s30,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,d0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,d0,#1920'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,d0,#64'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,d0,#63'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p7,d0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1 p0,d15,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,s0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,s0,#1920'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,s0,#64'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,s0,#63'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p7,s0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,s1,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,s30,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,d0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,d0,#1920'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,d0,#64'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,d0,#63'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p7,d0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx1a p0,d15,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,s0,s0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,s0,s0,#60'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,s0,s0,#2'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,s0,s0,#1'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p7,s0,s0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,s1,s0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,s30,s0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,s0,s1,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,s0,s30,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,d0,d0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,d0,d0,#60'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,d0,d0,#2'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,d0,d0,#1'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p7,d0,d0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,d15,d0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2 p0,d0,d15,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,s0,s0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,s0,s0,#60'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,s0,s0,#2'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,s0,s0,#1'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p7,s0,s0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,s1,s0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,s30,s0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,s0,s1,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,s0,s30,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,d0,d0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,d0,d0,#60'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,d0,d0,#2'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,d0,d0,#1'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p7,d0,d0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,d15,d0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx2a p0,d0,d15,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,s0,s0,s0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,s0,s0,s0,#6'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,s0,s0,s0,#1'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p7,s0,s0,s0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,s1,s0,s0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,s30,s0,s0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,s0,s1,s0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,s0,s30,s0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,s0,s0,s1,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,s0,s0,s30,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,d0,d0,d0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,d0,d0,d0,#6'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,d0,d0,d0,#1'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p7,d0,d0,d0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,d15,d0,d0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,d0,d15,d0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3 p0,d0,d0,d15,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,s0,s0,s0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,s0,s0,s0,#6'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,s0,s0,s0,#1'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p7,s0,s0,s0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,s1,s0,s0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,s30,s0,s0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,s0,s1,s0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,s0,s30,s0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,s0,s0,s1,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,s0,s0,s30,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,d0,d0,d0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,d0,d0,d0,#6'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,d0,d0,d0,#1'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p7,d0,d0,d0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,d15,d0,d0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,d0,d15,d0,#0'
+[^ :]+:[0-9]+: Error: vcx instructions with S or D registers require either MVE or Armv8-M floating point extension\. -- `vcx3a p0,d0,d0,d15,#0'