From: Luke Kenneth Casson Leighton Date: Wed, 31 Oct 2018 13:14:51 +0000 (+0000) Subject: override elwidth in sv_proc_t::f64 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3cca2b3795e2001a6e36b07f60b29bc76b8441a1;p=riscv-isa-sim.git override elwidth in sv_proc_t::f64 --- diff --git a/riscv/sv_insn_redirect.cc b/riscv/sv_insn_redirect.cc index b995c78..e270a99 100644 --- a/riscv/sv_insn_redirect.cc +++ b/riscv/sv_insn_redirect.cc @@ -561,9 +561,30 @@ sv_float32_t (sv_proc_t::f32)(sv_reg_t const& v) return ::f32(x); } -sv_float64_t (sv_proc_t::f64)(sv_freg_t v) +sv_float64_t (sv_proc_t::f64)(sv_freg_t x) { - return ::f64(v); + switch (x.get_elwidth()) + { + // 8-bit + case 1: throw trap_illegal_instruction(0); // XXX for now + // 16-bit data, up-convert to f32 + case 2: + { + sv_reg_t x64(x.to_uint64()); + float16_t f_16 = f16(x); + fprintf(stderr, "f16-to-f64 %lx\n", (uint64_t)x64); + return f16_to_f64(f_16); + } + case 3: + { + sv_reg_t x64(x.to_uint64()); + float32_t f_32 = f32(x); + fprintf(stderr, "f32-to-f64 %lx\n", (uint64_t)x64); + return f32_to_f64(f_32); + } + default: break; + } + return ::f64(x); } sv_float64_t (sv_proc_t::f64)(sv_reg_t const& v)