From: lkcl <lkcl@web>
Date: Mon, 4 Jul 2022 13:12:51 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~1350
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3cf2c46950ee3d4531e97fac4ff0219b0544a33a;p=libreriscv.git

---

diff --git a/openpower/isa.mdwn b/openpower/isa.mdwn
index e0aa2a14f..0b8f47c1d 100644
--- a/openpower/isa.mdwn
+++ b/openpower/isa.mdwn
@@ -22,7 +22,6 @@ the pseudo-code for all opcodes in the POWER v3.0B Public Spec
 * [[isa/sprset]]
 * [[isa/stringldst]]
 * [[isa/system]]
-* [[isa/simplev]]
 
 FP instructions: useful for testing <http://weitz.de/ieee/>
 
@@ -40,6 +39,10 @@ all **DRAFT FORM**. Explanation of the rules for twin register targets
 * [[isa/svfixedarith]]
 * [[isa/svfparith]]
 
+Part of the DRAFT Simple-V Specification:
+
+* [[isa/simplev]]
+
 A useful aide to finding Power ISA instructions: <https://power-isa-beta.mybluemix.net>
 
 # Pseudocode syntax