From: lkcl <lkcl@web>
Date: Mon, 22 May 2023 15:07:20 +0000 (+0100)
Subject: (no commit message)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3cfeb15d0a363b8fbd692b74259407057a24a15b;p=libreriscv.git

---

diff --git a/openpower/sv/svp64.mdwn b/openpower/sv/svp64.mdwn
index 06129bd7b..3746ab5c9 100644
--- a/openpower/sv/svp64.mdwn
+++ b/openpower/sv/svp64.mdwn
@@ -106,9 +106,10 @@ only 24 bits:
   and fail-first mode.
 
 Different classes of operations require different formats. The earlier
-sections cover the common formats and the four separate modes follow:
+sections cover the common formats and the five separate modes have their own
+section later:
 CR operations (crops), Arithmetic/Logical (termed "normal"), Load/Store
-and Branch-Conditional.
+Immediate, Load/Store Indexed, and Branch-Conditional.
 
 ## Definition of Reserved in this spec.