From: Clifford Wolf <clifford@clifford.at>
Date: Wed, 15 Aug 2018 11:35:41 +0000 (+0200)
Subject: Merge pull request #513 from udif/pr_reg_wire_error
X-Git-Tag: yosys-0.8~37
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3d27c1cc80da1c631bf5eb9c0b6b27e74ca73873;p=yosys.git

Merge pull request #513 from udif/pr_reg_wire_error

Add error checking for reg/wire/logic misuse - PR now passes 'make test' (plus a new test)
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3d27c1cc80da1c631bf5eb9c0b6b27e74ca73873