From: Jerome Glisse Date: Mon, 2 Aug 2010 17:28:15 +0000 (-0400) Subject: Revert "radeon: Add DRI2 flush extension to so we synchronize properly." X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3d39f56a8721ec6aa6d00965b7740fc8cb5edaae;p=mesa.git Revert "radeon: Add DRI2 flush extension to so we synchronize properly." This reverts commit 8446f257b3e3ca4a3eb2c79bc357e46343e04e87. --- diff --git a/src/mesa/drivers/dri/r200/r200_swtcl.c b/src/mesa/drivers/dri/r200/r200_swtcl.c index dbf4ad477db..262fe3cddee 100644 --- a/src/mesa/drivers/dri/r200/r200_swtcl.c +++ b/src/mesa/drivers/dri/r200/r200_swtcl.c @@ -612,8 +612,6 @@ static void r200RasterPrimitive( GLcontext *ctx, GLuint hwprim ) { r200ContextPtr rmesa = R200_CONTEXT(ctx); - radeon_prepare_render(&rmesa->radeon); - if (rmesa->radeon.swtcl.hw_primitive != hwprim) { /* need to disable perspective-correct texturing for point sprites */ if ((hwprim & 0xf) == R200_VF_PRIM_POINT_SPRITES && ctx->Point.PointSprite) { diff --git a/src/mesa/drivers/dri/r200/r200_tcl.c b/src/mesa/drivers/dri/r200/r200_tcl.c index 4ae0f304918..d43e14581e9 100644 --- a/src/mesa/drivers/dri/r200/r200_tcl.c +++ b/src/mesa/drivers/dri/r200/r200_tcl.c @@ -264,8 +264,6 @@ void r200TclPrimitive( GLcontext *ctx, r200ContextPtr rmesa = R200_CONTEXT(ctx); GLuint newprim = hw_prim | R200_VF_TCL_OUTPUT_VTX_ENABLE; - radeon_prepare_render(&rmesa->radeon); - if (newprim != rmesa->tcl.hw_primitive || !discrete_prim[hw_prim&0xf]) { /* need to disable perspective-correct texturing for point sprites */ diff --git a/src/mesa/drivers/dri/r300/r300_render.c b/src/mesa/drivers/dri/r300/r300_render.c index cf89ab7ec3d..bb8f91491f5 100644 --- a/src/mesa/drivers/dri/r300/r300_render.c +++ b/src/mesa/drivers/dri/r300/r300_render.c @@ -327,8 +327,6 @@ void r300RunRenderPrimitive(GLcontext * ctx, int start, int end, int prim) BATCH_LOCALS(&rmesa->radeon); int type, num_verts; - radeon_prepare_render(&rmesa->radeon); - type = r300PrimitiveType(rmesa, prim); num_verts = r300NumVerts(rmesa, end - start, prim); diff --git a/src/mesa/drivers/dri/r600/r700_clear.c b/src/mesa/drivers/dri/r600/r700_clear.c index d1008f28b9b..09c48565b68 100644 --- a/src/mesa/drivers/dri/r600/r700_clear.c +++ b/src/mesa/drivers/dri/r600/r700_clear.c @@ -48,7 +48,6 @@ static GLboolean r700ClearFast(context_t *context, GLbitfield mask) void r700Clear(GLcontext * ctx, GLbitfield mask) { context_t *context = R700_CONTEXT(ctx); - radeonContextPtr radeon = &context->radeon; __DRIdrawable *dPriv = radeon_get_drawable(&context->radeon); const GLuint colorMask = *((GLuint *) & ctx->Color.ColorMask[0]); GLbitfield swrast_mask = 0, tri_mask = 0; @@ -61,8 +60,6 @@ void r700Clear(GLcontext * ctx, GLbitfield mask) context->radeon.front_buffer_dirty = GL_TRUE; } - radeon_prepare_render(radeon); - if( GL_TRUE == r700ClearFast(context, mask) ) { return; diff --git a/src/mesa/drivers/dri/r600/r700_render.c b/src/mesa/drivers/dri/r600/r700_render.c index 316a0943f4e..1929b7cc129 100644 --- a/src/mesa/drivers/dri/r600/r700_render.c +++ b/src/mesa/drivers/dri/r600/r700_render.c @@ -977,10 +977,6 @@ static void r700DrawPrims(GLcontext *ctx, { GLboolean retval = GL_FALSE; - context_t *context = R700_CONTEXT(ctx); - radeonContextPtr radeon = &context->radeon; - radeon_prepare_render(radeon); - /* This check should get folded into just the places that * min/max index are really needed. */ diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.c b/src/mesa/drivers/dri/radeon/radeon_common_context.c index 3665944c3e2..5a7d52c4d2f 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.c +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.c @@ -493,43 +493,6 @@ radeon_bits_per_pixel(const struct radeon_renderbuffer *rb) return _mesa_get_format_bytes(rb->base.Format) * 8; } -/* - * Check if drawable has been invalidated by dri2InvalidateDrawable(). - * Update renderbuffers if so. This prevents a client from accessing - * a backbuffer that has a swap pending but not yet completed. - * - * See intel_prepare_render for equivalent code in intel driver. - * - */ -void radeon_prepare_render(radeonContextPtr radeon) -{ - __DRIcontext *driContext = radeon->dri.context; - __DRIdrawable *drawable; - __DRIscreen *screen; - - screen = driContext->driScreenPriv; - if (!screen->dri2.loader) - return; - - drawable = driContext->driDrawablePriv; - if (drawable->dri2.stamp != driContext->dri2.draw_stamp) { - if (drawable->lastStamp != drawable->dri2.stamp) - radeon_update_renderbuffers(driContext, drawable, GL_FALSE); - - /* Intel driver does the equivalent of this, no clue if it is needed: - * radeon_draw_buffer(radeon->glCtx, &(drawable->driverPrivate)->base); - */ - driContext->dri2.draw_stamp = drawable->dri2.stamp; - } - - drawable = driContext->driReadablePriv; - if (drawable->dri2.stamp != driContext->dri2.read_stamp) { - if (drawable->lastStamp != drawable->dri2.stamp) - radeon_update_renderbuffers(driContext, drawable, GL_FALSE); - driContext->dri2.read_stamp = drawable->dri2.stamp; - } -} - void radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable, GLboolean front_only) @@ -551,11 +514,6 @@ radeon_update_renderbuffers(__DRIcontext *context, __DRIdrawable *drawable, screen = context->driScreenPriv; radeon = (radeonContextPtr) context->driverPrivate; - /* Set this up front, so that in case our buffers get invalidated - * while we're getting new buffers, we don't clobber the stamp and - * thus ignore the invalidate. */ - drawable->lastStamp = drawable->dri2.stamp; - if (screen->dri2.loader && (screen->dri2.loader->base.version > 2) && (screen->dri2.loader->getBuffersWithFormat != NULL)) { diff --git a/src/mesa/drivers/dri/radeon/radeon_common_context.h b/src/mesa/drivers/dri/radeon/radeon_common_context.h index ec773cfa522..5156c5d0d0a 100644 --- a/src/mesa/drivers/dri/radeon/radeon_common_context.h +++ b/src/mesa/drivers/dri/radeon/radeon_common_context.h @@ -614,6 +614,5 @@ GLboolean radeonMakeCurrent(__DRIcontext * driContextPriv, __DRIdrawable * driDrawPriv, __DRIdrawable * driReadPriv); extern void radeonDestroyContext(__DRIcontext * driContextPriv); -void radeon_prepare_render(radeonContextPtr radeon); #endif diff --git a/src/mesa/drivers/dri/radeon/radeon_screen.c b/src/mesa/drivers/dri/radeon/radeon_screen.c index d3d7b216baa..82107cc6aeb 100644 --- a/src/mesa/drivers/dri/radeon/radeon_screen.c +++ b/src/mesa/drivers/dri/radeon/radeon_screen.c @@ -376,21 +376,6 @@ static const __DRItexBufferExtension r600TexBufferExtension = { }; #endif -static void -radeonDRI2Flush(__DRIdrawable *drawable) -{ - radeonContextPtr rmesa; - - rmesa = (radeonContextPtr) drawable->driContextPriv->driverPrivate; - radeonFlush(rmesa->glCtx); -} - -static const struct __DRI2flushExtensionRec radeonFlushExtension = { - { __DRI2_FLUSH, __DRI2_FLUSH_VERSION }, - radeonDRI2Flush, - dri2InvalidateDrawable, -}; - static int radeon_set_screen_flags(radeonScreenPtr screen, int device_id) { screen->device_id = device_id; @@ -1394,8 +1379,6 @@ radeonCreateScreen2(__DRIscreen *sPriv) screen->extensions[i++] = &r600TexBufferExtension.base; #endif - screen->extensions[i++] = &radeonFlushExtension.base; - screen->extensions[i++] = NULL; sPriv->extensions = screen->extensions; diff --git a/src/mesa/drivers/dri/radeon/radeon_swtcl.c b/src/mesa/drivers/dri/radeon/radeon_swtcl.c index 67be466c3f8..f2fcb46688a 100644 --- a/src/mesa/drivers/dri/radeon/radeon_swtcl.c +++ b/src/mesa/drivers/dri/radeon/radeon_swtcl.c @@ -408,8 +408,6 @@ static GLboolean radeon_run_render( GLcontext *ctx, !radeon_dma_validate_render( ctx, VB )) return GL_TRUE; - radeon_prepare_render(&rmesa->radeon); - tnl->Driver.Render.Start( ctx ); for (i = 0 ; i < VB->PrimitiveCount ; i++) diff --git a/src/mesa/drivers/dri/radeon/radeon_tcl.c b/src/mesa/drivers/dri/radeon/radeon_tcl.c index 5e1718f9dfc..ea796e1a45f 100644 --- a/src/mesa/drivers/dri/radeon/radeon_tcl.c +++ b/src/mesa/drivers/dri/radeon/radeon_tcl.c @@ -252,8 +252,6 @@ void radeonTclPrimitive( GLcontext *ctx, GLuint se_cntl; GLuint newprim = hw_prim | RADEON_CP_VC_CNTL_TCL_ENABLE; - radeon_prepare_render(&rmesa->radeon); - if (newprim != rmesa->tcl.hw_primitive || !discrete_prim[hw_prim&0xf]) { RADEON_NEWPRIM( rmesa );