From: Vincentius Robby Date: Wed, 8 Aug 2007 18:54:02 +0000 (-0400) Subject: Port, StaticInst: Revert unnecessary changes. X-Git-Tag: m5_2.0_beta4~193^2~5 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3d40cba8d456b7057d84332799f129dadaff9cd3;p=gem5.git Port, StaticInst: Revert unnecessary changes. --HG-- extra : convert_revision : e6ef262bbbc5ad53498e55caac1897e6cc2a61e6 --- diff --git a/src/cpu/static_inst.hh b/src/cpu/static_inst.hh index c4a29da59..2e1ebd766 100644 --- a/src/cpu/static_inst.hh +++ b/src/cpu/static_inst.hh @@ -597,19 +597,20 @@ StaticInst::decode(StaticInst::ExtMachInst mach_inst, Addr addr) Addr page_addr = addr & ~(TheISA::PageBytes - 1); // checks recently decoded addresses - if (recentDecodes[0].decodePage) { - if (page_addr == recentDecodes[0].page_addr) { - if (recentDecodes[0].decodePage->decoded(mach_inst, addr)) - return recentDecodes[0].decodePage->getInst(addr); - - return searchCache(mach_inst, addr, recentDecodes[0].decodePage); - } else if (recentDecodes[1].decodePage && - page_addr == recentDecodes[1].page_addr) { - if (recentDecodes[1].decodePage->decoded(mach_inst, addr)) - return recentDecodes[1].decodePage->getInst(addr); - - return searchCache(mach_inst, addr, recentDecodes[1].decodePage); - } + if (recentDecodes[0].decodePage && + page_addr == recentDecodes[0].page_addr) { + if (recentDecodes[0].decodePage->decoded(mach_inst, addr)) + return recentDecodes[0].decodePage->getInst(addr); + + return searchCache(mach_inst, addr, recentDecodes[0].decodePage); + } + + if (recentDecodes[1].decodePage && + page_addr == recentDecodes[1].page_addr) { + if (recentDecodes[1].decodePage->decoded(mach_inst, addr)) + return recentDecodes[1].decodePage->getInst(addr); + + return searchCache(mach_inst, addr, recentDecodes[1].decodePage); } // searches the page containing the address to decode diff --git a/src/mem/bus.hh b/src/mem/bus.hh index 32a039335..83a4f6a55 100644 --- a/src/mem/bus.hh +++ b/src/mem/bus.hh @@ -193,17 +193,17 @@ class Bus : public MemObject // Checks the cache and returns the id of the port that has the requested // address within its range inline int checkPortCache(Addr addr) { - if (portCache[0].valid) { - if (addr >= portCache[0].start && addr < portCache[0].end) { - return portCache[0].id; - } else if (portCache[1].valid) { - if (addr >= portCache[1].start && addr < portCache[1].end) { - return portCache[1].id; - } else if (portCache[2].valid && addr >= portCache[2].start && - addr < portCache[2].end) { - return portCache[2].id; - } - } + if (portCache[0].valid && addr >= portCache[0].start && + addr < portCache[0].end) { + return portCache[0].id; + } + if (portCache[1].valid && addr >= portCache[1].start && + addr < portCache[1].end) { + return portCache[1].id; + } + if (portCache[2].valid && addr >= portCache[2].start && + addr < portCache[2].end) { + return portCache[2].id; } return -1; @@ -312,17 +312,14 @@ class Bus : public MemObject // Checks the peer port interfaces cache for the port id and returns // a pointer to the matching port inline BusPort* checkBusCache(short id) { - if (busCache[0].valid) { - if (id == busCache[0].id) { - return busCache[0].port; - if (busCache[1].valid) { - if (id == busCache[1].id) { - return busCache[1].port; - if (busCache[2].valid && id == busCache[2].id) - return busCache[2].port; - } - } - } + if (busCache[0].valid && id == busCache[0].id) { + return busCache[0].port; + } + if (busCache[1].valid && id == busCache[1].id) { + return busCache[1].port; + } + if (busCache[2].valid && id == busCache[2].id) { + return busCache[2].port; } return NULL; @@ -345,7 +342,6 @@ class Bus : public MemObject // Invalidates the cache. Needs to be called in constructor. inline void clearBusCache() { - // memset(busCache, 0, 3 * sizeof(BusCache)); busCache[2].valid = false; busCache[1].valid = false; busCache[0].valid = false;