From: whitequark Date: Fri, 5 Feb 2021 06:49:34 +0000 (+0000) Subject: Merge pull request #2572 from antmicro/check-labels X-Git-Tag: working-ls180~92 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3d9898272a5afd60f6080603bf065056d9dca000;p=yosys.git Merge pull request #2572 from antmicro/check-labels verilog_parser: add label check to gen_block --- 3d9898272a5afd60f6080603bf065056d9dca000