From: Anuj Phogat Date: Tue, 2 Apr 2019 21:35:34 +0000 (-0700) Subject: intel/l3: Add DG1 L3 configuration X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3daa86675124b6b91c108b52e78d032deae1ef15;p=mesa.git intel/l3: Add DG1 L3 configuration Reworks: * Jordan: Make DG1 L3 config table empty Signed-off-by: Anuj Phogat Signed-off-by: Jordan Justen Acked-by: Lionel Landwerlin Reviewed-by: Jason Ekstrand Part-of: --- diff --git a/src/intel/common/gen_l3_config.c b/src/intel/common/gen_l3_config.c index 6bfcb6ba7d7..059a1ed7c14 100644 --- a/src/intel/common/gen_l3_config.c +++ b/src/intel/common/gen_l3_config.c @@ -165,6 +165,14 @@ static const struct gen_l3_config tgl_l3_configs[] = { }; DECLARE_L3_LIST(tgl); +/** + * DG1 validated L3 configurations. \sa dg1_l3_configs. + */ +static const struct gen_l3_config dg1_l3_configs[] = { + /* No configurations. L3FullWayAllocationEnable is always set. */ +}; +DECLARE_L3_LIST(dg1); + /** * Return a zero-terminated array of validated L3 configurations for the * specified device. @@ -191,7 +199,10 @@ get_l3_list(const struct gen_device_info *devinfo) return &icl_l3_list; case 12: - return &tgl_l3_list; + if (devinfo->is_dg1) + return &dg1_l3_list; + else + return &tgl_l3_list; default: unreachable("Not implemented");