From: Ali Saidi <Ali.Saidi@ARM.com>
Date: Wed, 23 Feb 2011 21:10:49 +0000 (-0600)
Subject: O3: If there is an outstanding table walk don't let the inst queue sleep.
X-Git-Tag: stable_2012_02_02~535
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3de8e0a0d4acaee84760961089db623518b784f7;p=gem5.git

O3: If there is an outstanding table walk don't let the inst queue sleep.

If there is an outstanding table walk and no other activity in the CPU
it can go to sleep and never wake up. This change makes the instruction
queue always active if the CPU is waiting for a store to translate.

If Gabe changes the way this code works then the below should be removed
as indicated by the todo.
---

diff --git a/src/cpu/o3/inst_queue_impl.hh b/src/cpu/o3/inst_queue_impl.hh
index aa21a0edc..1a211af7a 100644
--- a/src/cpu/o3/inst_queue_impl.hh
+++ b/src/cpu/o3/inst_queue_impl.hh
@@ -880,7 +880,10 @@ InstructionQueue<Impl>::scheduleReadyInsts()
     iqInstsIssued+= total_issued;
 
     // If we issued any instructions, tell the CPU we had activity.
-    if (total_issued || total_deferred_mem_issued) {
+    // @todo If the way deferred memory instructions are handeled due to
+    // translation changes then the deferredMemInsts condition should be removed
+    // from the code below.
+    if (total_issued || total_deferred_mem_issued || deferredMemInsts.size()) {
         cpu->activityThisCycle();
     } else {
         DPRINTF(IQ, "Not able to schedule any instructions.\n");