From: Palle Lyckegaard Date: Tue, 15 Sep 2015 13:14:07 +0000 (-0500) Subject: sparc: writing to tick_cmpr should not cause a panic X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3de9def6c1ad38d6a5068b07512cbefffafcb758;p=gem5.git sparc: writing to tick_cmpr should not cause a panic This register is writable according to UA2005 Tried to boot NetBSD which starts the kernel by writing to the tick_cmpr register. Without the patch gem5 crashes with a panic. With the patch NetBSD starts to boot normally (although sun4v support in NetBSD is not complete yet) Committed by: Nilay Vaish --- diff --git a/src/arch/sparc/ua2005.cc b/src/arch/sparc/ua2005.cc index d3708d861..b207f2fac 100644 --- a/src/arch/sparc/ua2005.cc +++ b/src/arch/sparc/ua2005.cc @@ -116,7 +116,7 @@ ISA::setFSReg(int miscReg, const MiscReg &val, ThreadContext *tc) cpu->deschedule(tickCompare); cpu->schedule(tickCompare, cpu->clockEdge(Cycles(time))); } - panic("writing to TICK compare register %#X\n", val); + DPRINTF(Timer, "writing to TICK compare register value %#X\n", val); break; case MISCREG_STICK_CMPR: