From: Jacob Lifshay Date: Fri, 19 Jan 2024 07:54:00 +0000 (-0800) Subject: fosdem2024_bigint.tex: add bigint add frame X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3df7339360d72aca61399aad31b6bdaa33db9230;p=libreriscv.git fosdem2024_bigint.tex: add bigint add frame --- diff --git a/conferences/fosdem2024/fosdem2024_bigint/fosdem2024_bigint.tex b/conferences/fosdem2024/fosdem2024_bigint/fosdem2024_bigint.tex index a484c63e1..8e51dbb11 100644 --- a/conferences/fosdem2024/fosdem2024_bigint/fosdem2024_bigint.tex +++ b/conferences/fosdem2024/fosdem2024_bigint/fosdem2024_bigint.tex @@ -43,6 +43,24 @@ add r5, r17, r12 \end{itemize} \end{frame} +\begin{frame}[fragile] + \frametitle{Big-Integer Addition on SVP64} + How can we use SVP64 to add 192-bit integers? + \pause + \begin{semiverbatim} +setvl 0, 0, 4, 0, 1, 1 # makes stuff run 4 times +addic 0, 0, 0 # clear CA (carry flag) +sv.adde *r4, *r4, *r8 # carry-propagating add +\pause +# expands to: +addic 0, 0, 0 # clear CA (carry flag) +adde r4, r4, r8 +adde r5, r5, r9 +adde r6, r6, r10 +adde r6, r6, r11 + \end{semiverbatim} +\end{frame} + \begin{frame} \input{test.dia-tex} \end{frame}