From: Kevin Lim Date: Wed, 7 Jun 2006 18:46:18 +0000 (-0400) Subject: Clear misc regs at startup. X-Git-Tag: m5_2.0_beta1~36^2~101 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3e191b14776c7a2c967e80c24331b27a50b8df77;p=gem5.git Clear misc regs at startup. src/arch/alpha/regfile.hh: Define clear functions on the individual reg files. src/cpu/o3/regfile.hh: Be sure to clear the misc reg file at startup. --HG-- extra : convert_revision : 41e640887f0cf15d778c59a4dcd544d46899b527 --- diff --git a/src/arch/alpha/regfile.hh b/src/arch/alpha/regfile.hh index ed410fddb..1025412cd 100644 --- a/src/arch/alpha/regfile.hh +++ b/src/arch/alpha/regfile.hh @@ -62,6 +62,8 @@ namespace AlphaISA void unserialize(Checkpoint *cp, const std::string §ion); + void clear() + { bzero(regs, sizeof(regs)); } }; class FloatRegFile @@ -77,6 +79,8 @@ namespace AlphaISA void unserialize(Checkpoint *cp, const std::string §ion); + void clear() + { bzero(d, sizeof(d)); } }; class MiscRegFile { @@ -102,6 +106,12 @@ namespace AlphaISA Fault setRegWithEffect(int misc_reg, const MiscReg &val, ThreadContext *tc); + void clear() + { + fpcr = uniq = 0; + lock_flag = 0; + lock_addr = 0; + } #if FULL_SYSTEM protected: typedef uint64_t InternalProcReg; @@ -171,9 +181,9 @@ namespace AlphaISA void clear() { - bzero(&intRegFile, sizeof(intRegFile)); - bzero(&floatRegFile, sizeof(floatRegFile)); - bzero(&miscRegFile, sizeof(miscRegFile)); + intRegFile.clear(); + floatRegFile.clear(); + miscRegFile.clear(); } MiscReg readMiscReg(int miscReg) diff --git a/src/cpu/o3/regfile.hh b/src/cpu/o3/regfile.hh index ee95b9ab8..a142b7102 100644 --- a/src/cpu/o3/regfile.hh +++ b/src/cpu/o3/regfile.hh @@ -299,6 +299,10 @@ PhysRegFile::PhysRegFile(unsigned _numPhysicalIntRegs, intRegFile.resize(numPhysicalIntRegs); floatRegFile.resize(numPhysicalFloatRegs); + for (int i = 0; i < Impl::MaxThreads; ++i) { + miscRegs[i].clear(); + } + //memset(intRegFile, 0, sizeof(*intRegFile)); //memset(floatRegFile, 0, sizeof(*floatRegFile)); }