From: Christian König Date: Wed, 8 Mar 2017 11:51:13 +0000 (+0100) Subject: radeon/UVD: fix the decoding target pitch calculation X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3e1e441aa05069e3eee906144cf96898e0b802e2;p=mesa.git radeon/UVD: fix the decoding target pitch calculation The firmware expects the value in pixel not bytes. Didn't made a difference so far because we only used 8bpp surfaces. Signed-off-by: Christian König Reviewed-by: Mark Thompson --- diff --git a/src/gallium/drivers/radeon/radeon_uvd.c b/src/gallium/drivers/radeon/radeon_uvd.c index f1339d121b7..7a08c81cbc0 100644 --- a/src/gallium/drivers/radeon/radeon_uvd.c +++ b/src/gallium/drivers/radeon/radeon_uvd.c @@ -1354,7 +1354,7 @@ static unsigned bank_wh(unsigned bankwh) void ruvd_set_dt_surfaces(struct ruvd_msg *msg, struct radeon_surf *luma, struct radeon_surf *chroma) { - msg->body.decode.dt_pitch = luma->level[0].nblk_x * luma->bpe; + msg->body.decode.dt_pitch = luma->level[0].nblk_x; switch (luma->level[0].mode) { case RADEON_SURF_MODE_LINEAR_ALIGNED: msg->body.decode.dt_tiling_mode = RUVD_TILE_LINEAR;