From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Mon, 14 Feb 2022 11:36:01 +0000 (+0000)
Subject: add IBM microwatt CC4 license and copyright notices
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3e296d7d7332e6bddf074ecce88efafd470f1ba7;p=ls2.git

add IBM microwatt CC4 license and copyright notices
---

diff --git a/LICENSE.CC4 b/LICENSE.CC4
new file mode 100644
index 0000000..d7bf7c5
--- /dev/null
+++ b/LICENSE.CC4
@@ -0,0 +1,8 @@
+© IBM Corp. 2019 
+This softcore is licensed under and subject to the terms of the CC-BY 4.0 
+license (https://creativecommons.org/licenses/by/4.0/legalcode). 
+Additional rights, including the right to physically implement a softcore 
+that is compliant with the required sections of the Power ISA 
+Specification, will be available at no cost via the OpenPOWER Foundation. 
+This README will be updated with additional information when OpenPOWER's 
+license is available.
diff --git a/verilator/microwatt-verilator.cpp b/verilator/microwatt-verilator.cpp
index 4df3084..1bf1dde 100644
--- a/verilator/microwatt-verilator.cpp
+++ b/verilator/microwatt-verilator.cpp
@@ -1,3 +1,6 @@
+// Copyright (C) IBM 2019, see LICENSE.CC4
+// based on code from microwatt https://github.com/antonblanchard/microwatt
+
 #include <stdlib.h>
 #include "Vtop.h"
 #include "verilated.h"
diff --git a/verilator/uart-verilator.c b/verilator/uart-verilator.c
index 8492a11..8800692 100644
--- a/verilator/uart-verilator.c
+++ b/verilator/uart-verilator.c
@@ -1,3 +1,6 @@
+// Copyright (C) IBM 2019, see LICENSE.CC4
+// based on code from microwatt https://github.com/antonblanchard/microwatt
+
 #include <signal.h>
 #include <poll.h>
 #include <unistd.h>
diff --git a/verilator/uart-verilator.h b/verilator/uart-verilator.h
index 10ae8aa..9d4c0ff 100644
--- a/verilator/uart-verilator.h
+++ b/verilator/uart-verilator.h
@@ -1,3 +1,6 @@
+// Copyright (C) IBM 2019, see LICENSE.CC4
+// based on code from microwatt https://github.com/antonblanchard/microwatt
+
 /*
  * Our UART uses 16x oversampling, so at 50 MHz and 115200 baud
  * each sample is: 50000000/(115200*16) = 27 clock cycles. This