From: lkcl <lkcl@web>
Date: Wed, 20 Apr 2022 17:01:11 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: opf_rfc_ls005_v1~2672
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3e3e958fbe699c2b893def0de16075132b9cc616;p=libreriscv.git

---

diff --git a/openpower/sv/svp64.mdwn b/openpower/sv/svp64.mdwn
index 85c27f931..567aa1656 100644
--- a/openpower/sv/svp64.mdwn
+++ b/openpower/sv/svp64.mdwn
@@ -409,11 +409,11 @@ is based on whether the number of src operands is 2 or 3.  With only
 
 | Field Name | Field bits | Description                            |
 |------------|------------|----------------------------------------|
-| Rdest\_EXTRA2 | `10:11`   | extends Rdest (R\*\_EXTRA2 Encoding)   |
+| Rdest\_EXTRA2 | `10:11` | extends Rdest (R\*\_EXTRA2 Encoding)   |
 | Rsrc1\_EXTRA2 | `12:13` | extends Rsrc1 (R\*\_EXTRA2 Encoding)   |
 | Rsrc2\_EXTRA2 | `14:15` | extends Rsrc2 (R\*\_EXTRA2 Encoding)   |
 | Rsrc3\_EXTRA2 | `16:17` | extends Rsrc3 (R\*\_EXTRA2 Encoding)   |
-| reserved      | `18` | reserved                               |
+| EXTRA2_MODE   | `18`    | used by `msubed` and `madded` for RS   |
 
 ## RM-1P-2S1D