From: Julia Koval Date: Fri, 8 Dec 2017 08:12:49 +0000 (+0100) Subject: Enable VNNI support [5/5] X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3e4a6f9d6c9d7a84d15c0d0504d2be7591c7d6c9;p=gcc.git Enable VNNI support [5/5] gcc/ * config/i386/avx512vnniintrin.h (_mm512_dpwssds_epi32, _mm512_mask_dpwssds_epi32, _mm512_maskz_dpwssds_epi32): New intrinsics. * config/i386/avx512vnnivlintrin.h (_mm256_dpwssds_epi32, _mm256_mask_dpwssds_epi32, _mm256_maskz_dpwssds_epi32, _mm_dpwssds_epi32, _mm_mask_dpwssds_epi32, _mm_maskz_dpwssds_epi32): Ditto. gcc/testsuite/ * gcc.target/i386/avx512f-vnni-1.c: Add checks for vdpdwssds. * gcc.target/i386/avx512vl-vnni-1.c: Ditto. * gcc.target/i386/avx512f-vpdpwssds-2.c: New test. * gcc.target/i386/avx512vl-vpdpwssds-2.c: Ditto. From-SVN: r255498 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a666d115e37..95aea7ac6c4 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2017-12-08 Julia Koval + + * config/i386/avx512vnniintrin.h (_mm512_dpwssds_epi32, + _mm512_mask_dpwssds_epi32, _mm512_maskz_dpwssds_epi32): New intrinsics. + * config/i386/avx512vnnivlintrin.h (_mm256_dpwssds_epi32, + _mm256_mask_dpwssds_epi32, _mm256_maskz_dpwssds_epi32, + _mm_dpwssds_epi32, _mm_mask_dpwssds_epi32, + _mm_maskz_dpwssds_epi32): Ditto. + 2017-12-08 Richard Biener PR tree-optimization/81303 diff --git a/gcc/config/i386/avx512vnniintrin.h b/gcc/config/i386/avx512vnniintrin.h index c435dc14a85..15ed76aa02b 100644 --- a/gcc/config/i386/avx512vnniintrin.h +++ b/gcc/config/i386/avx512vnniintrin.h @@ -110,6 +110,32 @@ _mm512_maskz_dpwssd_epi32 (__mmask16 __A, __m512i __B, __m512i __C, (__v16si) __C, (__v16si) __D, (__mmask16)__A); } +extern __inline __m512i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_dpwssds_epi32 (__m512i __A, __m512i __B, __m512i __C) +{ + return (__m512i) __builtin_ia32_vpdpwssds_v16si ((__v16si)__A, (__v16si) __B, + (__v16si) __C); +} + +extern __inline __m512i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_mask_dpwssds_epi32 (__m512i __A, __mmask16 __B, __m512i __C, + __m512i __D) +{ + return (__m512i)__builtin_ia32_vpdpwssds_v16si_mask ((__v16si)__A, + (__v16si) __C, (__v16si) __D, (__mmask16)__B); +} + +extern __inline __m512i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm512_maskz_dpwssds_epi32 (__mmask16 __A, __m512i __B, __m512i __C, + __m512i __D) +{ + return (__m512i)__builtin_ia32_vpdpwssds_v16si_maskz ((__v16si)__B, + (__v16si) __C, (__v16si) __D, (__mmask16)__A); +} + #ifdef __DISABLE_AVX512VNNI__ #undef __DISABLE_AVX512VNNI__ #pragma GCC pop_options diff --git a/gcc/config/i386/avx512vnnivlintrin.h b/gcc/config/i386/avx512vnnivlintrin.h index d87feaa3815..3e1f8a2c96c 100644 --- a/gcc/config/i386/avx512vnnivlintrin.h +++ b/gcc/config/i386/avx512vnnivlintrin.h @@ -179,6 +179,54 @@ _mm_maskz_dpwssd_epi32 (__mmask8 __A, __m128i __B, __m128i __C, __m128i __D) (__v4si) __C, (__v4si) __D, (__mmask8)__A); } +extern __inline __m256i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_dpwssds_epi32 (__m256i __A, __m256i __B, __m256i __C) +{ + return (__m256i) __builtin_ia32_vpdpwssds_v8si ((__v8si)__A, (__v8si) __B, + (__v8si) __C); +} + +extern __inline __m256i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_mask_dpwssds_epi32 (__m256i __A, __mmask8 __B, __m256i __C, __m256i __D) +{ + return (__m256i)__builtin_ia32_vpdpwssds_v8si_mask ((__v8si)__A, + (__v8si) __C, (__v8si) __D, (__mmask8)__B); +} + +extern __inline __m256i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm256_maskz_dpwssds_epi32 (__mmask8 __A, __m256i __B, __m256i __C, + __m256i __D) +{ + return (__m256i)__builtin_ia32_vpdpwssds_v8si_maskz ((__v8si)__B, + (__v8si) __C, (__v8si) __D, (__mmask8)__A); +} + +extern __inline __m128i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm_dpwssds_epi32 (__m128i __A, __m128i __B, __m128i __C) +{ + return (__m128i) __builtin_ia32_vpdpwssds_v4si ((__v4si)__A, (__v4si) __B, + (__v4si) __C); +} + +extern __inline __m128i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm_mask_dpwssds_epi32 (__m128i __A, __mmask8 __B, __m128i __C, __m128i __D) +{ + return (__m128i)__builtin_ia32_vpdpwssds_v4si_mask ((__v4si)__A, + (__v4si) __C, (__v4si) __D, (__mmask8)__B); +} + +extern __inline __m128i +__attribute__((__gnu_inline__, __always_inline__, __artificial__)) +_mm_maskz_dpwssds_epi32 (__mmask8 __A, __m128i __B, __m128i __C, __m128i __D) +{ + return (__m128i)__builtin_ia32_vpdpwssds_v4si_maskz ((__v4si)__B, + (__v4si) __C, (__v4si) __D, (__mmask8)__A); +} #ifdef __DISABLE_AVX512VNNIVL__ #undef __DISABLE_AVX512VNNIVL__ #pragma GCC pop_options diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 8324d4f3ad4..258c6d03fe4 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2017-12-08 Julia Koval + + * gcc.target/i386/avx512f-vnni-1.c: Add checks for vdpdwssds. + * gcc.target/i386/avx512vl-vnni-1.c: Ditto. + * gcc.target/i386/avx512f-vpdpwssds-2.c: New test. + * gcc.target/i386/avx512vl-vpdpwssds-2.c: Ditto. + 2017-12-08 Richard Biener PR tree-optimization/81303 diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vnni-1.c b/gcc/testsuite/gcc.target/i386/avx512f-vnni-1.c index d6c319b8007..9d34dc0e831 100644 --- a/gcc/testsuite/gcc.target/i386/avx512f-vnni-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512f-vnni-1.c @@ -9,6 +9,9 @@ /* { dg-final { scan-assembler-times "vpdpwssd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vpdpwssd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vpdpwssd\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpwssds\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+\[^\n\r]*%zmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpwssds\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpwssds\[ \\t\]+\[^\{\n\]*%zmm\[0-9\]+\[^\\n\\r]*%zmm\[0-9\]+\[^\\n\\r\]*%zmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ #include @@ -32,4 +35,7 @@ avx512f_test (void) x = _mm512_mask_dpwssd_epi32 (x, m16, y, z); x = _mm512_maskz_dpwssd_epi32 (m16, x, y, z); + x = _mm512_dpwssds_epi32 (x, y, z); + x = _mm512_mask_dpwssds_epi32 (x, m16, y, z); + x = _mm512_maskz_dpwssds_epi32 (m16, x, y, z); } diff --git a/gcc/testsuite/gcc.target/i386/avx512f-vpdpwssds-2.c b/gcc/testsuite/gcc.target/i386/avx512f-vpdpwssds-2.c new file mode 100644 index 00000000000..41933f3c137 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512f-vpdpwssds-2.c @@ -0,0 +1,72 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512f -mavx512vnni" } */ +/* { dg-require-effective-target avx512f } */ +/* { dg-require-effective-target avx512vnni } */ + +#define AVX512F + +#define AVX512VNNI +#include "avx512f-helper.h" + +#define SIZE (AVX512F_LEN / 16) +#define SIZE_RES (AVX512F_LEN / 32) + +#include "avx512f-mask-type.h" + +static void +CALC (int *r, int *dst, short *s1, short *s2) +{ + short tempres[SIZE]; + for (int i = 0; i < SIZE; i++) { + tempres[i] = ((int)(s1[i]) * (int)(s2[i])); + } + for (int i = 0; i < SIZE_RES; i++) { + long long test = (long long)dst[i] + tempres[i*2] + tempres[i*2 + 1]; + long long max_int = 0x7FFFFFFF; + if (test > max_int) + test = 0x7FFFFFFF; + r[i] = test; + } +} + +void +TEST (void) +{ + int i; + UNION_TYPE (AVX512F_LEN, i_d) res1, res2, res3; + UNION_TYPE (AVX512F_LEN, i_w) src1, src2; + MASK_TYPE mask = MASK_VALUE; + int res_ref[SIZE_RES]; + int res_ref2[SIZE_RES]; + + for (i = 0; i < SIZE; i++) + { + src1.a[i] = 1 + i; + src2.a[i] = 2 + 2*i; + } + + for (i = 0; i < SIZE_RES; i++) + { + res1.a[i] = 0x7fffffff; + res2.a[i] = DEFAULT_VALUE; + res3.a[i] = DEFAULT_VALUE; + } + + CALC (res_ref, res1.a, src1.a, src2.a); + CALC (res_ref2, res2.a, src1.a, src2.a); + + res1.x = INTRINSIC (_dpwssds_epi32) (res1.x, src1.x, src2.x); + res2.x = INTRINSIC (_mask_dpwssds_epi32) (res2.x, mask, src1.x, src2.x); + res3.x = INTRINSIC (_maskz_dpwssds_epi32) (mask, res3.x, src1.x, src2.x); + + if (UNION_CHECK (AVX512F_LEN, i_d) (res1, res_ref)) + abort (); + + MASK_MERGE (i_d) (res_ref2, mask, SIZE_RES); + if (UNION_CHECK (AVX512F_LEN, i_d) (res2, res_ref2)) + abort (); + + MASK_ZERO (i_d) (res_ref2, mask, SIZE_RES); + if (UNION_CHECK (AVX512F_LEN, i_d) (res3, res_ref2)) + abort (); +} diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vnni-1.c b/gcc/testsuite/gcc.target/i386/avx512vl-vnni-1.c index aba98979021..e63bc196b0e 100644 --- a/gcc/testsuite/gcc.target/i386/avx512vl-vnni-1.c +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vnni-1.c @@ -18,6 +18,12 @@ /* { dg-final { scan-assembler-times "vpdpwssd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vpdpwssd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\\n\\r]*%xmm\[0-9\]+\[^\\n\\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ /* { dg-final { scan-assembler-times "vpdpwssd\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\\n\\r]*%xmm\[0-9\]+\[^\\n\\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpwssds\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+\[^\n\r]*%ymm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpwssds\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\\n\\r]*%ymm\[0-9\]+\[^\\n\\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpwssds\[ \\t\]+\[^\{\n\]*%ymm\[0-9\]+\[^\\n\\r]*%ymm\[0-9\]+\[^\\n\\r\]*%ymm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpwssds\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+\[^\n\r]*%xmm\[0-9\]+(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpwssds\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\\n\\r]*%xmm\[0-9\]+\[^\\n\\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}(?:\n|\[ \\t\]+#)" 1 } } */ +/* { dg-final { scan-assembler-times "vpdpwssds\[ \\t\]+\[^\{\n\]*%xmm\[0-9\]+\[^\\n\\r]*%xmm\[0-9\]+\[^\\n\\r\]*%xmm\[0-9\]+\{%k\[1-7\]\}\{z\}(?:\n|\[ \\t\]+#)" 1 } } */ #include @@ -53,4 +59,11 @@ avx512f_test (void) x_ = _mm_mask_dpwssd_epi32 (x_, m, y_, z_); x_ = _mm_maskz_dpwssd_epi32 (m, x_, y_, z_); + x = _mm256_dpwssds_epi32 (x, y, z); + x = _mm256_mask_dpwssds_epi32 (x, m, y, z); + x = _mm256_maskz_dpwssds_epi32 (m, x, y, z); + + x_ = _mm_dpwssds_epi32 (x_, y_, z_); + x_ = _mm_mask_dpwssds_epi32 (x_, m, y_, z_); + x_ = _mm_maskz_dpwssds_epi32 (m, x_, y_, z_); } diff --git a/gcc/testsuite/gcc.target/i386/avx512vl-vpdpwssds-2.c b/gcc/testsuite/gcc.target/i386/avx512vl-vpdpwssds-2.c new file mode 100644 index 00000000000..9fd3d493608 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/avx512vl-vpdpwssds-2.c @@ -0,0 +1,16 @@ +/* { dg-do run } */ +/* { dg-options "-O2 -mavx512vnni -mavx512vl" } */ +/* { dg-require-effective-target avx512vl } */ +/* { dg-require-effective-target avx512vnni } */ + +#define AVX512VL +#define AVX512F_LEN 256 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpdpwssds-2.c" + +#undef AVX512F_LEN +#undef AVX512F_LEN_HALF + +#define AVX512F_LEN 128 +#define AVX512F_LEN_HALF 128 +#include "avx512f-vpdpwssds-2.c"