From: Rhys Perry Date: Tue, 3 Dec 2019 10:48:18 +0000 (+0000) Subject: nir/load_store_vectorize: fix combining stores with aliasing loads between X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3e67aa2e4e0c116b8b3f1e3717b086fdb576934e;p=mesa.git nir/load_store_vectorize: fix combining stores with aliasing loads between v2: add test Fixes: ce9205c03bd ('nir: add a load/store vectorization pass') Signed-off-by: Rhys Perry Reviewed-by: Daniel Schürmann (v1) Reviewed-by: Connor Abbott (v2) --- diff --git a/src/compiler/nir/nir_opt_load_store_vectorize.c b/src/compiler/nir/nir_opt_load_store_vectorize.c index ff9959b11c7..c40d4ada4ee 100644 --- a/src/compiler/nir/nir_opt_load_store_vectorize.c +++ b/src/compiler/nir/nir_opt_load_store_vectorize.c @@ -989,13 +989,13 @@ check_for_aliasing(struct vectorize_ctx *ctx, struct entry *first, struct entry unsigned mode_index = ffs(mode) - 1; if (first->is_store) { - /* find first store that aliases "first" */ + /* find first entry that aliases "first" */ list_for_each_entry_from(struct entry, next, first, &ctx->entries[mode_index], head) { if (next == first) continue; if (next == second) return false; - if (next->is_store && may_alias(first, next)) + if (may_alias(first, next)) return true; } } else { diff --git a/src/compiler/nir/tests/load_store_vectorizer_tests.cpp b/src/compiler/nir/tests/load_store_vectorizer_tests.cpp index 2251b43fb61..0b332d8bc78 100644 --- a/src/compiler/nir/tests/load_store_vectorizer_tests.cpp +++ b/src/compiler/nir/tests/load_store_vectorizer_tests.cpp @@ -620,6 +620,20 @@ TEST_F(nir_load_store_vectorize_test, ssbo_load_identical_store_identical) ASSERT_EQ(count_intrinsics(nir_intrinsic_load_ssbo), 2); } +TEST_F(nir_load_store_vectorize_test, ssbo_store_identical_load_identical) +{ + create_store(nir_var_mem_ssbo, 0, 0, 0x1); + create_load(nir_var_mem_ssbo, 0, 0, 0x2); + create_store(nir_var_mem_ssbo, 0, 0, 0x3); + + nir_validate_shader(b->shader, NULL); + ASSERT_EQ(count_intrinsics(nir_intrinsic_store_ssbo), 2); + + EXPECT_FALSE(run_vectorizer(nir_var_mem_ssbo)); + + ASSERT_EQ(count_intrinsics(nir_intrinsic_store_ssbo), 2); +} + /* if nir_opt_load_store_vectorize were implemented like many load/store * optimization passes are (for example, nir_opt_combine_stores and * nir_opt_copy_prop_vars) and stopped tracking a load when an aliasing store is