From: Paul Brook Date: Thu, 8 Sep 2005 12:49:27 +0000 (+0000) Subject: 2005-09-08 Paul Brook X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3eb17e6bd2ee08d2c08644bc141cd29005f6a266;p=binutils-gdb.git 2005-09-08 Paul Brook bfd/ * reloc.c: Rename BFD_RELOC_ARM_SMI to BFD_RELOC_ARM_SMC. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. opcodes/ * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc. gas/ * config/tc-arm.c (do_smi, do_t_smi): Rename ... (do_smc, do_t_smc): ... to this. (insns): Remane smi to smc. (md_apply_fix, tc_gen_reloc): Rename BFD_RELOC_ARM_SMI to BFD_RELOC_ARM_SMC. gas/testsuite/ * gas/arm/arch6zk.d: Rename smi to smc. * gas/arm/arch6zk.s: Ditto. * gas/arm/thumb32.d: Ditto. * gas/arm/thumb32.s: Ditto. --- diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 4f4ae5a2570..1c781488c74 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,9 @@ +2005-09-08 Paul Brook + + * reloc.c: Rename BFD_RELOC_ARM_SMI to BFD_RELOC_ARM_SMC. + * bfd-in2.h: Regenerate. + * libbfd.h: Regenerate. + 2005-09-06 H.J. Lu PR ld/1301 diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h index 07ca098a469..807c229df61 100644 --- a/bfd/bfd-in2.h +++ b/bfd/bfd-in2.h @@ -2876,7 +2876,7 @@ pc-relative or some form of GOT-indirect relocation. */ BFD_RELOC_ARM_T32_IMM12, BFD_RELOC_ARM_T32_ADD_PC12, BFD_RELOC_ARM_SHIFT_IMM, - BFD_RELOC_ARM_SMI, + BFD_RELOC_ARM_SMC, BFD_RELOC_ARM_SWI, BFD_RELOC_ARM_MULTI, BFD_RELOC_ARM_CP_OFF_IMM, diff --git a/bfd/libbfd.h b/bfd/libbfd.h index fc27a3e8c8d..de939ec8c7c 100644 --- a/bfd/libbfd.h +++ b/bfd/libbfd.h @@ -1214,7 +1214,7 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@", "BFD_RELOC_ARM_T32_IMM12", "BFD_RELOC_ARM_T32_ADD_PC12", "BFD_RELOC_ARM_SHIFT_IMM", - "BFD_RELOC_ARM_SMI", + "BFD_RELOC_ARM_SMC", "BFD_RELOC_ARM_SWI", "BFD_RELOC_ARM_MULTI", "BFD_RELOC_ARM_CP_OFF_IMM", diff --git a/bfd/reloc.c b/bfd/reloc.c index 3bd0d7cc34b..ab50c7b8389 100644 --- a/bfd/reloc.c +++ b/bfd/reloc.c @@ -2744,7 +2744,7 @@ ENUMX ENUMX BFD_RELOC_ARM_SHIFT_IMM ENUMX - BFD_RELOC_ARM_SMI + BFD_RELOC_ARM_SMC ENUMX BFD_RELOC_ARM_SWI ENUMX diff --git a/gas/ChangeLog b/gas/ChangeLog index 180ae68f2e6..8162ec969cd 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,11 @@ +2005-09-08 Paul Brook + + * config/tc-arm.c (do_smi, do_t_smi): Rename ... + (do_smc, do_t_smc): ... to this. + (insns): Remane smi to smc. + (md_apply_fix, tc_gen_reloc): Rename BFD_RELOC_ARM_SMI to + BFD_RELOC_ARM_SMC. + 2005-09-07 Richard Henderson * dwarf2dbg.c (dwarf2_where): Set line->isa. diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index 3ac19b17247..c11e149b459 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -5095,9 +5095,9 @@ do_shift (void) } static void -do_smi (void) +do_smc (void) { - inst.reloc.type = BFD_RELOC_ARM_SMI; + inst.reloc.type = BFD_RELOC_ARM_SMC; inst.reloc.pc_rel = 0; } @@ -7430,7 +7430,7 @@ do_t_simd (void) } static void -do_t_smi (void) +do_t_smc (void) { unsigned int value = inst.reloc.exp.X_add_number; constraint (inst.reloc.exp.X_op != O_constant, @@ -8846,7 +8846,7 @@ static const struct asm_opcode insns[] = #undef ARM_VARIANT #define ARM_VARIANT ARM_EXT_V6Z - TCE(smi, 1600070, f7f08000, 1, (EXPi), smi, t_smi), + TCE(smc, 1600070, f7f08000, 1, (EXPi), smc, t_smc), #undef ARM_VARIANT #define ARM_VARIANT ARM_EXT_V6T2 @@ -11268,10 +11268,10 @@ md_apply_fix (fixS * fixP, md_number_to_chars (buf+2, (valueT) (newval & 0xffff), THUMB_SIZE); break; - case BFD_RELOC_ARM_SMI: + case BFD_RELOC_ARM_SMC: if (((unsigned long) value) > 0xffff) as_bad_where (fixP->fx_file, fixP->fx_line, - _("invalid smi expression")); + _("invalid smc expression")); newval = md_chars_to_number (buf, INSN_SIZE); newval |= (value & 0xf) | ((value & 0xfff0) << 4); md_number_to_chars (buf, newval, INSN_SIZE); @@ -11866,7 +11866,7 @@ tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, case BFD_RELOC_NONE: type = "NONE"; break; case BFD_RELOC_ARM_OFFSET_IMM8: type = "OFFSET_IMM8"; break; case BFD_RELOC_ARM_SHIFT_IMM: type = "SHIFT_IMM"; break; - case BFD_RELOC_ARM_SMI: type = "SMI"; break; + case BFD_RELOC_ARM_SMC: type = "SMC"; break; case BFD_RELOC_ARM_SWI: type = "SWI"; break; case BFD_RELOC_ARM_MULTI: type = "MULTI"; break; case BFD_RELOC_ARM_CP_OFF_IMM: type = "CP_OFF_IMM"; break; diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index a61ff32e614..bdf4b4d43a3 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2005-09-08 Paul Brook + + * gas/arm/arch6zk.d: Rename smi to smc. + * gas/arm/arch6zk.s: Ditto. + * gas/arm/thumb32.d: Ditto. + * gas/arm/thumb32.s: Ditto. + 2005-09-07 Richard Henderson * gas/lns/lns-common-1.d: Don't match header or special opcode numbers. @@ -7,7 +14,7 @@ 2005-09-07 Richard Henderson * gas/mips/mips16-dwarf2.d: Don't match anything but address and line - number increments. Adjust relocation address. + number increments. Adjust relocation address. * gas/mips/mips16-dwarf2-n32.d: Likewise. Add "N32" to test name. 2005-09-07 Richard Henderson diff --git a/gas/testsuite/gas/arm/arch6zk.d b/gas/testsuite/gas/arm/arch6zk.d index e645ca02a2a..e9dee215f4c 100644 --- a/gas/testsuite/gas/arm/arch6zk.d +++ b/gas/testsuite/gas/arm/arch6zk.d @@ -24,8 +24,8 @@ Disassembly of section .text: 0+040 <[^>]*> e320f002 ? wfe 0+044 <[^>]*> e320f003 ? wfi 0+048 <[^>]*> e320f001 ? yield -0+04c <[^>]*> e16ec371 ? smi 60465 -0+050 <[^>]*> 11613c7e ? smine 5070 +0+04c <[^>]*> e16ec371 ? smc 60465 +0+050 <[^>]*> 11613c7e ? smcne 5070 0+054 <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\) 0+058 <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\) 0+05c <[^>]*> e1a00000 ? nop[ ]+\(mov r0,r0\) diff --git a/gas/testsuite/gas/arm/arch6zk.s b/gas/testsuite/gas/arm/arch6zk.s index f182406197a..93398675b82 100644 --- a/gas/testsuite/gas/arm/arch6zk.s +++ b/gas/testsuite/gas/arm/arch6zk.s @@ -23,8 +23,8 @@ label: wfi yield # ARMV6Z instructions - smi 0xec31 - smine 0x13ce + smc 0xec31 + smcne 0x13ce # Add three nop instructions to ensure that the # output is 32-byte aligned as required for arm-aout. diff --git a/gas/testsuite/gas/arm/thumb32.d b/gas/testsuite/gas/arm/thumb32.d index f6883a3d931..0c1da2fc757 100644 --- a/gas/testsuite/gas/arm/thumb32.d +++ b/gas/testsuite/gas/arm/thumb32.d @@ -810,8 +810,8 @@ Disassembly of section .text: 0[0-9a-f]+ <[^>]+> fa60 f009 ror\.w r0, r0, r9 0[0-9a-f]+ <[^>]+> fa60 f005 ror\.w r0, r0, r5 0[0-9a-f]+ <[^>]+> fa71 f002 rors\.w r0, r1, r2 -0[0-9a-f]+ <[^>]+> f7f0 8000 smi #0 ; 0x0 -0[0-9a-f]+ <[^>]+> f7fd 8bca smi #43981 ; 0xabcd +0[0-9a-f]+ <[^>]+> f7f0 8000 smc #0 ; 0x0 +0[0-9a-f]+ <[^>]+> f7fd 8bca smc #43981 ; 0xabcd 0[0-9a-f]+ <[^>]+> fb10 0000 smlabb r0, r0, r0, r0 0[0-9a-f]+ <[^>]+> fb10 0900 smlabb r9, r0, r0, r0 0[0-9a-f]+ <[^>]+> fb19 0000 smlabb r0, r9, r0, r0 diff --git a/gas/testsuite/gas/arm/thumb32.s b/gas/testsuite/gas/arm/thumb32.s index 7a60f513b8e..5f4dc68856e 100644 --- a/gas/testsuite/gas/arm/thumb32.s +++ b/gas/testsuite/gas/arm/thumb32.s @@ -609,9 +609,9 @@ shift: .purgem sh -smi: - smi #0 - smi #0xabcd +smc: + smc #0 + smc #0xabcd smla: smlabb r0, r0, r0, r0 diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 471b9cb4d97..9ce7380109c 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2005-09-08 Paul Brook + + * arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc. + 2005-09-06 Chao-ying Fu * mips-opc.c (MT32): New define. diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index 266c91a600f..7888e8f5561 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -440,7 +440,7 @@ static const struct opcode32 arm_opcodes[] = {ARM_EXT_V6T2, 0x07a00050, 0x0fa00070, "%22?usbfx%c\t%12-15r, %0-3r, #%7-11d, #%16-20W"}, /* ARM V6Z instructions. */ - {ARM_EXT_V6Z, 0x01600070, 0x0ff000f0, "smi%c\t%e"}, + {ARM_EXT_V6Z, 0x01600070, 0x0ff000f0, "smc%c\t%e"}, /* ARM V6K instructions. */ {ARM_EXT_V6K, 0xf57ff01f, 0xffffffff, "clrex"}, @@ -968,7 +968,7 @@ static const struct opcode32 thumb32_opcodes[] = {ARM_EXT_V6T2, 0xfbe00000, 0xfff000f0, "umlal\t%12-15r, %8-11r, %16-19r, %0-3r"}, {ARM_EXT_V6T2, 0xfbe00060, 0xfff000f0, "umaal\t%12-15r, %8-11r, %16-19r, %0-3r"}, {ARM_EXT_V6T2, 0xe8500f00, 0xfff00f00, "ldrex\t%12-15r, [%16-19r, #%0-7W]"}, - {ARM_EXT_V6T2, 0xf7f08000, 0xfff0f000, "smi\t%K"}, + {ARM_EXT_V6T2, 0xf7f08000, 0xfff0f000, "smc\t%K"}, {ARM_EXT_V6T2, 0xf04f0000, 0xfbef8000, "mov%20's.w\t%8-11r, %M"}, {ARM_EXT_V6T2, 0xf06f0000, 0xfbef8000, "mvn%20's.w\t%8-11r, %M"}, {ARM_EXT_V6T2, 0xf810f000, 0xff70f000, "pld\t%a"},