From: Luke Kenneth Casson Leighton Date: Sat, 31 Oct 2020 11:47:04 +0000 (+0000) Subject: add start of isa-to-virtual regs X-Git-Tag: convert-csv-opcode-to-binary~1900 X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3f202e15f97e5abc3c0582c630d5878c268b334d;p=libreriscv.git add start of isa-to-virtual regs --- diff --git a/3d_gpu/isa_to_virrtual_regs_table.jpg b/3d_gpu/isa_to_virrtual_regs_table.jpg deleted file mode 100644 index 0dfdb89e2..000000000 Binary files a/3d_gpu/isa_to_virrtual_regs_table.jpg and /dev/null differ diff --git a/3d_gpu/isa_to_virtual_regs.mdwn b/3d_gpu/isa_to_virtual_regs.mdwn new file mode 100644 index 000000000..5604250c7 --- /dev/null +++ b/3d_gpu/isa_to_virtual_regs.mdwn @@ -0,0 +1,3 @@ +# Lookup table for Virtual Registers including renaming + +[[!img isa_to_virtual_regs_table.jpg]] diff --git a/3d_gpu/isa_to_virtual_regs_table.jpg b/3d_gpu/isa_to_virtual_regs_table.jpg new file mode 100644 index 000000000..0dfdb89e2 Binary files /dev/null and b/3d_gpu/isa_to_virtual_regs_table.jpg differ