From: Xan <Xan@web>
Date: Wed, 25 Apr 2018 05:19:27 +0000 (+0100)
Subject: (no commit message)
X-Git-Tag: convert-csv-opcode-to-binary~5553
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3f2040802b0ea73b43c72c747653254f6ec0014c;p=libreriscv.git

---

diff --git a/A_Harmonised_RVV_and_Packed_SIMD.mdwn b/A_Harmonised_RVV_and_Packed_SIMD.mdwn
index 8a6883b64..80493336c 100644
--- a/A_Harmonised_RVV_and_Packed_SIMD.mdwn
+++ b/A_Harmonised_RVV_and_Packed_SIMD.mdwn
@@ -60,8 +60,8 @@ The above are pure subsets of valid RVV VCFG configurations (and hence forward c
 | SUB16 rt, ra, rb   | sub                       | VSUB (r16 <= rt,ra,rb <= r29), mm=00|
 | RSUB16 rt, ra, rb  | Signed Halving sub        | |
 | URSUB16 rt, ra, rb | Unsigned Halving sub                | |
-| KSUB16 rt, ra, rb  | Signed Saturating sub               | |
-| UKSUB16 rt, ra, rb | Unsigned Saturating sub             | |
+| KSUB16 rt, ra, rb  | Signed Saturating sub               | VSUB (r16 <= rt,ra,rb <= r23), mm=01|
+| UKSUB16 rt, ra, rb | Unsigned Saturating sub             | VSUB (r24 <= rt,ra,rb <= r29), mm=01|
 | CRAS16 rt, ra, rb  | Cross Add & Sub                     | |
 | RCRAS16 rt, ra, rb | Signed Halving Cross Add & Sub      | |
 | URCRAS16 rt, ra, rb| Unsigned Halving Cross Add & Sub    | |
@@ -85,4 +85,6 @@ The above are pure subsets of valid RVV VCFG configurations (and hence forward c
 | SUB8 rt, ra, rb    | sub                       | VSUB (r2 <= rt,ra,rb <= r15), mm=00 |
 | RSUB8 rt, ra, rb   | Signed Halving sub        | |
 | URSUB8 rt, ra, rb  | Unsigned Halving sub      | |
+| KSUB8 rt, ra, rb   | Signed Saturating sub        | VSUB (r2 <= rt,ra,rb <= r7), mm=01 |
+| UKSUB8 rt, ra, rb  | Unsigned Saturating sub      | VSUB (r8 <= rt,ra,rb <= r15), mm=01 |