From: Eddie Hung <eddie@fpgeh.com>
Date: Tue, 16 Jul 2019 22:54:07 +0000 (-0700)
Subject: Signed extension
X-Git-Tag: working-ls180~1039^2~355
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3f677fb0db15f75d9655fe653f991c94e78a4a1f;p=yosys.git

Signed extension
---

diff --git a/passes/pmgen/xilinx_dsp.cc b/passes/pmgen/xilinx_dsp.cc
index a09f96a7f..a4602dd63 100644
--- a/passes/pmgen/xilinx_dsp.cc
+++ b/passes/pmgen/xilinx_dsp.cc
@@ -50,7 +50,7 @@ void pack_xilinx_dsp(xilinx_dsp_pm &pm)
 
 		if (st.ffA) {
 			SigSpec D = st.ffA->getPort("\\D");
-			cell->setPort("\\A", D.extend_u0(30));
+			cell->setPort("\\A", D.extend_u0(30, true));
 			cell->setParam("\\AREG", State::S1);
 			if (st.ffA->type == "$dff")
 				cell->setPort("\\CEA2", State::S1);
@@ -60,7 +60,7 @@ void pack_xilinx_dsp(xilinx_dsp_pm &pm)
 		}
 		if (st.ffB) {
 			SigSpec D = st.ffB->getPort("\\D");
-			cell->setPort("\\B", D.extend_u0(18));
+			cell->setPort("\\B", D.extend_u0(18, true));
 			cell->setParam("\\BREG", State::S1);
 			if (st.ffB->type == "$dff")
 				cell->setPort("\\CEB2", State::S1);
diff --git a/passes/pmgen/xilinx_dsp.pmg b/passes/pmgen/xilinx_dsp.pmg
index ceed64b30..4b7bea308 100644
--- a/passes/pmgen/xilinx_dsp.pmg
+++ b/passes/pmgen/xilinx_dsp.pmg
@@ -9,10 +9,10 @@ endmatch
 
 match ffA
 	select ffA->type.in($dff, $dffe)
+	select param(ffA, \CLK_POLARITY).as_bool()
 	// select nusers(port(ffA, \Q)) == 2
-	index <SigSpec> port(ffA, \Q).extend_u0(30) === port(dsp, \A)
+	index <SigSpec> port(ffA, \Q).extend_u0(25, true) === port(dsp, \A).extract(0, 25)
 	// DSP48E1 does not support clock inversion
-	index <Const> param(ffA, \CLK_POLARITY).as_bool() === true
 	optional
 endmatch
 
@@ -23,9 +23,9 @@ endcode
 
 match ffB
 	select ffB->type.in($dff, $dffe)
+	select param(ffB, \CLK_POLARITY).as_bool()
 	// select nusers(port(ffB, \Q)) == 2
-	index <SigSpec> port(ffB, \Q).extend_u0(18) === port(dsp, \B)
-	index <Const> param(ffB, \CLK_POLARITY).as_bool() === true
+	index <SigSpec> port(ffB, \Q).extend_u0(18, true) === port(dsp, \B)
 	optional
 endmatch