From: lkcl <lkcl@web>
Date: Wed, 26 Apr 2023 16:23:57 +0000 (+0100)
Subject: (no commit message)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3f78aaa34a4e112cd0e1586b6004f5d845fc1428;p=libreriscv.git

---

diff --git a/openpower/sv/vector_ops/discussion.mdwn b/openpower/sv/vector_ops/discussion.mdwn
index 20dd66877..e09283373 100644
--- a/openpower/sv/vector_ops/discussion.mdwn
+++ b/openpower/sv/vector_ops/discussion.mdwn
@@ -212,6 +212,13 @@ mask-out effect of resetting the count back to zero.
 However close examination shows that the above may actually
 be `sv.addi/mr/sm=EQ/sz *r1, *r0, 1` TODO check this
 
+this looks promising:
+
+    sv.add *v4+1, *v4, *v2
+
+where v2 is guaranteed to contain 0 or 1, the dependency chain
+accumulates v2 via the overlap between src1 and dest vectors.
+
 # cprop
 
 * <https://www.geeksforgeeks.org/carry-look-ahead-adder/>