From: Eric Anholt <eric@anholt.net>
Date: Sat, 4 Dec 2010 00:50:19 +0000 (-0800)
Subject: i965: Align gen6 push constant size to dispatch width.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3f8bcb0d998820594ea288e4607462fa4479859f;p=mesa.git

i965: Align gen6 push constant size to dispatch width.

The FS backend is fine with register level granularity.  But for the
brw_wm_emit.c backend, it expects pairs of regs to be used for the
constants, because the whole world is pairs of regs.  If an odd number
got used, we went looking for interpolation in the wrong place.
---

diff --git a/src/mesa/drivers/dri/i965/gen6_wm_state.c b/src/mesa/drivers/dri/i965/gen6_wm_state.c
index 0d839de10dd..8968caef510 100644
--- a/src/mesa/drivers/dri/i965/gen6_wm_state.c
+++ b/src/mesa/drivers/dri/i965/gen6_wm_state.c
@@ -105,7 +105,8 @@ upload_wm_state(struct brw_context *brw)
 		(5 - 2));
       OUT_RELOC(brw->wm.push_const_bo,
 		I915_GEM_DOMAIN_RENDER, 0, /* XXX: bad domain */
-		ALIGN(brw->wm.prog_data->nr_params, 8) / 8 - 1);
+		ALIGN(brw->wm.prog_data->nr_params,
+		      brw->wm.prog_data->dispatch_width) / 8 - 1);
       OUT_BATCH(0);
       OUT_BATCH(0);
       OUT_BATCH(0);