From: Andrew Waterman Date: Tue, 7 Sep 2010 00:06:50 +0000 (-0700) Subject: [sim] fixed bug in msub.d; added ability to print FPRs in debug mode X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3fb39c1739ee133f877d5ea50721d2b9db36610f;p=riscv-isa-sim.git [sim] fixed bug in msub.d; added ability to print FPRs in debug mode --- diff --git a/riscv/insns/msub_d.h b/riscv/insns/msub_d.h index a35dc19..747cacc 100644 --- a/riscv/insns/msub_d.h +++ b/riscv/insns/msub_d.h @@ -1,3 +1,3 @@ require_fp; -FRC = f64_mulAdd(FRA, FRB, FRD ^ (uint32_t)INT64_MIN); +FRC = f64_mulAdd(FRA, FRB, FRD ^ (uint64_t)INT64_MIN); set_fp_exceptions; diff --git a/riscv/sim.cc b/riscv/sim.cc index 668d23a..06a9cba 100644 --- a/riscv/sim.cc +++ b/riscv/sim.cc @@ -71,6 +71,8 @@ void sim_t::run(bool debug) funcs["rp"] = &sim_t::interactive_run_proc_noisy; funcs["rps"] = &sim_t::interactive_run_proc_silent; funcs["reg"] = &sim_t::interactive_reg; + funcs["fregs"] = &sim_t::interactive_fregs; + funcs["fregd"] = &sim_t::interactive_fregd; funcs["mem"] = &sim_t::interactive_mem; funcs["until"] = &sim_t::interactive_until; funcs["q"] = &sim_t::interactive_quit; @@ -165,11 +167,45 @@ reg_t sim_t::get_reg(const std::vector& args) return procs[p].R[r]; } +reg_t sim_t::get_freg(const std::vector& args) +{ + if(args.size() != 2) + throw trap_illegal_instruction; + + int p = atoi(args[0].c_str()); + int r = atoi(args[1].c_str()); + if(p >= (int)procs.size() || r >= NFPR) + throw trap_illegal_instruction; + + return procs[p].FR[r]; +} + void sim_t::interactive_reg(const std::vector& args) { printf("0x%016llx\n",(unsigned long long)get_reg(args)); } +union fpr +{ + reg_t r; + float s; + double d; +}; + +void sim_t::interactive_fregs(const std::vector& args) +{ + fpr f; + f.r = get_freg(args); + printf("%g\n",f.s); +} + +void sim_t::interactive_fregd(const std::vector& args) +{ + fpr f; + f.r = get_freg(args); + printf("%g\n",f.d); +} + reg_t sim_t::get_mem(const std::vector& args) { if(args.size() != 1) diff --git a/riscv/sim.h b/riscv/sim.h index c8faa0c..4072fcf 100644 --- a/riscv/sim.h +++ b/riscv/sim.h @@ -43,10 +43,13 @@ private: void interactive_run_proc_silent(const std::vector& args); void interactive_reg(const std::vector& args); + void interactive_fregs(const std::vector& args); + void interactive_fregd(const std::vector& args); void interactive_mem(const std::vector& args); void interactive_until(const std::vector& args); reg_t get_reg(const std::vector& args); + reg_t get_freg(const std::vector& args); reg_t get_mem(const std::vector& args); reg_t get_pc(const std::vector& args);