From: Andrew Pinski <pinskia@physics.uc.edu>
Date: Fri, 30 Apr 2004 12:19:32 +0000 (+0000)
Subject: rs6000-power2-1.c: Change to compile only.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3fbf917d464160182ae77afcb0ac9b3205aead5d;p=gcc.git

rs6000-power2-1.c: Change to compile only.

2004-04-30  Andrew Pinski  <pinskia@physics.uc.edu>

        * rs6000-power2-1.c: Change to compile only.
        * rs6000-power2-2.c: Likewise.

From-SVN: r81337
---

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 2214658bbbc..6ffc75ad769 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2004-04-30  Andrew Pinski  <pinskia@physics.uc.edu>
+
+	* rs6000-power2-1.c: Change to compile only.
+	* rs6000-power2-2.c: Likewise.
+
 2004-04-29  Andrew Pinski  <pinskia@physics.uc.edu>
 
 	* gcc.dg/rs6000-power2-1.c: Change the options to be more correct.
diff --git a/gcc/testsuite/gcc.dg/rs6000-power2-1.c b/gcc/testsuite/gcc.dg/rs6000-power2-1.c
index 0e9b5aa1d5d..7d344a93a2c 100644
--- a/gcc/testsuite/gcc.dg/rs6000-power2-1.c
+++ b/gcc/testsuite/gcc.dg/rs6000-power2-1.c
@@ -1,4 +1,4 @@
-/* { dg-do assemble { target powerpc-*-* rs6000-*-* }  } */
+/* { dg-do compile { target powerpc-*-* rs6000-*-* }  } */
 /* { dg-options "-O3 -mcpu=power2 -fno-schedule-insns -w -mhard-float" } */
 /* This used to ICE as the peephole was not checking to see
    if the register is a floating point one (I think this cannot
diff --git a/gcc/testsuite/gcc.dg/rs6000-power2-2.c b/gcc/testsuite/gcc.dg/rs6000-power2-2.c
index 74cc0ec64e3..2fefbcbfb81 100644
--- a/gcc/testsuite/gcc.dg/rs6000-power2-2.c
+++ b/gcc/testsuite/gcc.dg/rs6000-power2-2.c
@@ -1,4 +1,4 @@
-/* { dg-do assemble { target powerpc-*-* rs6000-*-* }  } */
+/* { dg-do compile { target powerpc-*-* rs6000-*-* }  } */
 /* { dg-options "-O3 -mcpu=power2 -fno-schedule-insns -w -mhard-float" } */
 /* { dg-final { scan-assembler-not "lfd" } } */
 /* { dg-final { scan-assembler-not "sfd" } } */