From: bugzilla-daemon Date: Mon, 23 Mar 2020 10:24:15 +0000 (+0000) Subject: [libre-riscv-dev] [Bug 264] ISA switch needs to be a privileged operation X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3fddaa6fb9cdbe78dbaec1ceecc2a5e0e5c6b6b5;p=libre-riscv-dev.git [libre-riscv-dev] [Bug 264] ISA switch needs to be a privileged operation --- diff --git a/c9/8de3739216c587979d071485c373aa1f017521 b/c9/8de3739216c587979d071485c373aa1f017521 new file mode 100644 index 0000000..1437f33 --- /dev/null +++ b/c9/8de3739216c587979d071485c373aa1f017521 @@ -0,0 +1,73 @@ +Return-path: +Envelope-to: publicinbox@libre-riscv.org +Delivery-date: Mon, 23 Mar 2020 10:24:17 +0000 +Received: from localhost ([::1] helo=libre-riscv.org) + by libre-riscv.org with esmtp (Exim 4.89) + (envelope-from ) + id 1jGKFk-00067o-Gb; Mon, 23 Mar 2020 10:24:16 +0000 +Received: from localhost ([127.0.0.1] helo=bugs.libre-riscv.org) + by libre-riscv.org with esmtp (Exim 4.89) + (envelope-from ) id 1jGKFi-00067Y-Kp + for libre-riscv-dev@lists.libre-riscv.org; Mon, 23 Mar 2020 10:24:14 +0000 +From: bugzilla-daemon@libre-riscv.org +To: libre-riscv-dev@lists.libre-riscv.org +Date: Mon, 23 Mar 2020 10:24:15 +0000 +X-Bugzilla-Reason: CC +X-Bugzilla-Type: changed +X-Bugzilla-Watch-Reason: None +X-Bugzilla-Product: Libre-SOC's first SoC +X-Bugzilla-Component: Specification +X-Bugzilla-Version: unspecified +X-Bugzilla-Keywords: +X-Bugzilla-Severity: enhancement +X-Bugzilla-Who: lkcl@lkcl.net +X-Bugzilla-Status: CONFIRMED +X-Bugzilla-Resolution: +X-Bugzilla-Priority: High +X-Bugzilla-Assigned-To: lkcl@lkcl.net +X-Bugzilla-Flags: +X-Bugzilla-Changed-Fields: +Message-ID: +In-Reply-To: +References: +X-Bugzilla-URL: http://bugs.libre-riscv.org/ +Auto-Submitted: auto-generated +MIME-Version: 1.0 +Subject: [libre-riscv-dev] [Bug 264] ISA switch needs to be a privileged + operation +X-BeenThere: libre-riscv-dev@lists.libre-riscv.org +X-Mailman-Version: 2.1.23 +Precedence: list +List-Id: Libre-RISCV General Development + +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Reply-To: Libre-RISCV General Development + +Content-Type: text/plain; charset="utf-8" +Content-Transfer-Encoding: base64 +Errors-To: libre-riscv-dev-bounces@lists.libre-riscv.org +Sender: "libre-riscv-dev" + +aHR0cDovL2J1Z3MubGlicmUtcmlzY3Yub3JnL3Nob3dfYnVnLmNnaT9pZD0yNjQKCi0tLSBDb21t +ZW50ICMxMCBmcm9tIEx1a2UgS2VubmV0aCBDYXNzb24gTGVpZ2h0b24gPGxrY2xAbGtjbC5uZXQ+ +IC0tLQooSW4gcmVwbHkgdG8gY2FuZCBmcm9tIGNvbW1lbnQgIzcpCj4gU3RvcmluZyBzdGF0ZSBz +b3VuZHMgZGFuZ2Vyb3VzLCBjb25zaWRlciBzb21lb25lIGp1bXBpbmcgaW50byB0aGUgbWlkZGxl +IG9mCj4gY29tcHJlc3NlZCBpbnN0cnMuCgp0aGlzIGlzIHByZWNpc2VseSB3aGF0IGEgY29udGV4 +dC1zd2l0Y2ggaGFzIHRvIGJlIGFibGUgdG8gZG8sIGJlY2F1c2UgYSB0cmFwCm1heSBvY2N1ciBp +biB0aGUgbWlkZGxlIG9mIGEgcGFpciBvZiBDIGluc3Rycy4KCmkgdmVyeSBjYXJlZnVsbHkgZGVz +aWduZWQgVkJMT0NLIGFyb3VuZCBwcmVjaXNlbHkgdGhpcyBwcmluY2lwbGUsIGludm9sdmluZwpz +dGF0ZSBpbmZvcm1hdGlvbiB0aGF0IGlzIHJlcXVpcmVkIHRvIGJlIGNvbnRleHQtc3dpdGNoZWQu +CgphbmQgeWVzLCBpZiBhbiBlbmQtdXNlciB3cml0ZXMgY29kZSB0aGF0IGp1bXBzIGludG8gdGhl +IG1pZGRsZSBvZiBhIGJsb2NrCndpdGhvdXQgcmVzcGVjdGluZyB0aGUgc3BlY2lmaWNhdGlvbiwg +dGhleSdyZSBvbiB0aGVpciBvd24uCgotLSAKWW91IGFyZSByZWNlaXZpbmcgdGhpcyBtYWlsIGJl +Y2F1c2U6CllvdSBhcmUgb24gdGhlIENDIGxpc3QgZm9yIHRoZSBidWcuCl9fX19fX19fX19fX19f +X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCmxpYnJlLXJpc2N2LWRldiBtYWlsaW5n +IGxpc3QKbGlicmUtcmlzY3YtZGV2QGxpc3RzLmxpYnJlLXJpc2N2Lm9yZwpodHRwOi8vbGlzdHMu +bGlicmUtcmlzY3Yub3JnL21haWxtYW4vbGlzdGluZm8vbGlicmUtcmlzY3YtZGV2Cg== +