From: Luke Leighton <lkcl@lkcl.net>
Date: Sun, 25 Feb 2018 10:24:50 +0000 (+0000)
Subject: add flexbus libreriscv bug page
X-Git-Tag: convert-csv-opcode-to-binary~5866
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3fe36080967c51713e3c09fe1a3a55528e66f3ad;p=libreriscv.git

add flexbus libreriscv bug page
---

diff --git a/shakti/m_class.mdwn b/shakti/m_class.mdwn
index eff8d8740..4bf065d0a 100644
--- a/shakti/m_class.mdwn
+++ b/shakti/m_class.mdwn
@@ -221,11 +221,7 @@ At its own page [[I2S]]
 
 ## FlexBus
 
-FlexBus is capable of emulating the 8080-style / ATI MCU Bus, as well as
-providing support for access to SRAM.  It is extremely likely that it will
-provide access to MCU-style Ethernet PHY ICs such as the DM9000, the
-AX88180 (gigabit ethernet but an enormous number of pins), the AX88796A
-(8/16-bit 80186 or MC68k).
+At its own page [[FlexBus]]
 
 ## RGB/TTL interface
 
diff --git a/shakti/m_class/FlexBus.mdwn b/shakti/m_class/FlexBus.mdwn
new file mode 100644
index 000000000..8064eca34
--- /dev/null
+++ b/shakti/m_class/FlexBus.mdwn
@@ -0,0 +1,10 @@
+# FlexBus
+
+FlexBus is capable of emulating the 8080-style / ATI MCU Bus, as well as
+providing support for access to SRAM.  It is extremely likely that it will
+provide access to MCU-style Ethernet PHY ICs such as the DM9000, the
+AX88180 (gigabit ethernet but an enormous number of pins), the AX88796A
+(8/16-bit 80186 or MC68k).
+
+* <http://bugs.libre-riscv.org/show_bug.cgi?id=4>
+