From: Connor Abbott <cwabbott0@gmail.com>
Date: Mon, 16 Mar 2020 14:23:44 +0000 (+0100)
Subject: tu: Fix border color with compute shaders
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=3ff437abb3f4ecaef1e3f241392b827cc3fdd202;p=mesa.git

tu: Fix border color with compute shaders

I wasn't able to find any CTS tests that used compute shaders with
samplers and set a border color, so I hacked one of the tests included
with amber:

https://gist.github.com/cwabbott0/e72f0ed8259b84ed6bf3920c68fefee6

The register was found via looking at dumps of the Vulkan blob, and
setting it fixes this test.

Tested-by: Marge Bot <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4204>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/4204>
---

diff --git a/src/freedreno/registers/a6xx.xml b/src/freedreno/registers/a6xx.xml
index 94dfb36e9c0..04f632ebea0 100644
--- a/src/freedreno/registers/a6xx.xml
+++ b/src/freedreno/registers/a6xx.xml
@@ -3049,6 +3049,12 @@ to upconvert to 32b float internally?
 	<!-- always 0x3f ? -->
 	<reg32 offset="0xae0f" name="SP_UNKNOWN_AE0F"/>
 
+	<!--
+	The downstream kernel calls the debug cluster of registers
+	"a6xx_sp_ps_tp_cluster" but this actually specifies the border
+	color base for compute shaders.
+	-->
+	<reg64 offset="0xb180" name="SP_PS_TP_BORDER_COLOR_BASE_ADDR" type="address"/>
 	<!-- always 0x0 ? -->
 	<reg32 offset="0xb182" name="SP_UNKNOWN_B182"/>
 	<reg32 offset="0xb183" name="SP_UNKNOWN_B183"/>
diff --git a/src/freedreno/vulkan/tu_cmd_buffer.c b/src/freedreno/vulkan/tu_cmd_buffer.c
index d78356dbec8..515ef815950 100644
--- a/src/freedreno/vulkan/tu_cmd_buffer.c
+++ b/src/freedreno/vulkan/tu_cmd_buffer.c
@@ -1165,6 +1165,8 @@ tu6_init_hw(struct tu_cmd_buffer *cmd, struct tu_cs *cs)
 
    tu_cs_emit_regs(cs,
                    A6XX_SP_TP_BORDER_COLOR_BASE_ADDR(.bo = &cmd->device->border_color));
+   tu_cs_emit_regs(cs,
+                   A6XX_SP_PS_TP_BORDER_COLOR_BASE_ADDR(.bo = &cmd->device->border_color));
 
    tu_cs_sanity_check(cs);
 }