From: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
Date: Tue, 11 Jun 2019 16:43:08 +0000 (-0700)
Subject: panfrost/midgard: Implement txl
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4012e067880a6512d90e95d75b5349edcb627656;p=mesa.git

panfrost/midgard: Implement txl

This follows the txb implementation, but requires an adjustment to how
the cont/last flags are set.

Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com>
---

diff --git a/src/gallium/drivers/panfrost/midgard/midgard_compile.c b/src/gallium/drivers/panfrost/midgard/midgard_compile.c
index 85b7c425eb4..eacf84e89e6 100644
--- a/src/gallium/drivers/panfrost/midgard/midgard_compile.c
+++ b/src/gallium/drivers/panfrost/midgard/midgard_compile.c
@@ -1318,6 +1318,8 @@ midgard_tex_op(nir_texop op)
                 case nir_texop_tex:
                 case nir_texop_txb:
                         return TEXTURE_OP_NORMAL;
+                case nir_texop_txl:
+                        return TEXTURE_OP_LOD;
                 default:
                         unreachable("Unhanlded texture op");
         }
@@ -1377,7 +1379,8 @@ emit_tex(compiler_context *ctx, nir_tex_instr *instr)
                         break;
                 }
 
-                case nir_tex_src_bias: {
+                case nir_tex_src_bias:
+                case nir_tex_src_lod: {
                         /* To keep RA simple, we put the bias/LOD into the w
                          * component of the input source, which is otherwise in xy */
 
@@ -1417,9 +1420,6 @@ emit_tex(compiler_context *ctx, nir_tex_instr *instr)
 
                         /* Always 1 */
                         .unknown7 = 1,
-
-                        /* Assume we can continue; hint it out later */
-                        .cont = 1,
                 }
         };
 
@@ -1430,7 +1430,7 @@ emit_tex(compiler_context *ctx, nir_tex_instr *instr)
         /* Setup bias/LOD if necessary. Only register mode support right now.
          * TODO: Immediate mode for performance gains */
 
-        if (instr->op == nir_texop_txb) {
+        if (instr->op == nir_texop_txb || instr->op == nir_texop_txl) {
                 ins.texture.lod_register = true;
 
                 midgard_tex_register_select sel = {
diff --git a/src/gallium/drivers/panfrost/midgard/midgard_emit.c b/src/gallium/drivers/panfrost/midgard/midgard_emit.c
index ffa08735ff0..5ddcee419bf 100644
--- a/src/gallium/drivers/panfrost/midgard/midgard_emit.c
+++ b/src/gallium/drivers/panfrost/midgard/midgard_emit.c
@@ -214,9 +214,12 @@ emit_binary_bundle(compiler_context *ctx,
 
                 ctx->texture_op_count--;
 
-                if (!ctx->texture_op_count) {
-                        ins->texture.cont = 0;
-                        ins->texture.last = 1;
+                if (ins->texture.op == TEXTURE_OP_NORMAL) {
+                        bool continues = ctx->texture_op_count > 0;
+                        ins->texture.cont = continues;
+                        ins->texture.last = !continues;
+                } else {
+                        ins->texture.cont = ins->texture.last = 1;
                 }
 
                 util_dynarray_append(emission, midgard_texture_word, ins->texture);