From: Florent Kermarrec <florent@enjoy-digital.fr>
Date: Mon, 13 Jan 2020 19:01:45 +0000 (+0100)
Subject: SoCCore: use hex for integrated_rom/sram_size
X-Git-Tag: 24jan2021_ls180~746
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4050e608340c05228f89deacd04e22ca15ae72a8;p=litex.git

SoCCore: use hex for integrated_rom/sram_size
---

diff --git a/litex/soc/integration/soc_core.py b/litex/soc/integration/soc_core.py
index 59faef81..ffe0546f 100644
--- a/litex/soc/integration/soc_core.py
+++ b/litex/soc/integration/soc_core.py
@@ -85,9 +85,9 @@ class SoCCore(Module):
                 # CPU parameters
                 cpu_type="vexriscv", cpu_reset_address=0x00000000, cpu_variant=None,
                 # ROM parameters
-                integrated_rom_size=32768, integrated_rom_init=[],
+                integrated_rom_size=0x8000, integrated_rom_init=[],
                 # SRAM parameters
-                integrated_sram_size=4096, integrated_sram_init=[],
+                integrated_sram_size=0x1000, integrated_sram_init=[],
                 # MAIN_RAM parameters
                 integrated_main_ram_size=0, integrated_main_ram_init=[],
                 # CSR parameters