From: Pedro Alves Date: Sat, 18 Oct 2008 03:24:34 +0000 (+0000) Subject: * infrun.c (adjust_pc_after_break): Do nothing if executing in X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=4058b839704e5992381636e1e22c8969526d796b;p=binutils-gdb.git * infrun.c (adjust_pc_after_break): Do nothing if executing in reverse. --- diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 92dab5115fe..7490ff3390e 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,3 +1,8 @@ +2008-10-18 Pedro Alves + + * infrun.c (adjust_pc_after_break): Do nothing if executing in + reverse. + 2008-10-17 Pedro Alves * infcmd.c (GO_USAGE): Delete. diff --git a/gdb/infrun.c b/gdb/infrun.c index 511450115d9..0aab6698793 100644 --- a/gdb/infrun.c +++ b/gdb/infrun.c @@ -1826,6 +1826,35 @@ adjust_pc_after_break (struct execution_control_state *ecs) if (ecs->ws.value.sig != TARGET_SIGNAL_TRAP) return; + /* In reverse execution, when a breakpoint is hit, the instruction + under it has already been de-executed. The reported PC always + points at the breakpoint address, so adjusting it further would + be wrong. E.g., consider this case on a decr_pc_after_break == 1 + architecture: + + B1 0x08000000 : INSN1 + B2 0x08000001 : INSN2 + 0x08000002 : INSN3 + PC -> 0x08000003 : INSN4 + + Say you're stopped at 0x08000003 as above. Reverse continuing + from that point should hit B2 as below. Reading the PC when the + SIGTRAP is reported should read 0x08000001 and INSN2 should have + been de-executed already. + + B1 0x08000000 : INSN1 + B2 PC -> 0x08000001 : INSN2 + 0x08000002 : INSN3 + 0x08000003 : INSN4 + + We can't apply the same logic as for forward execution, because + we would wrongly adjust the PC to 0x08000000, since there's a + breakpoint at PC - 1. We'd then report a hit on B1, although + INSN1 hadn't been de-executed yet. Doing nothing is the correct + behaviour. */ + if (execution_direction == EXEC_REVERSE) + return; + /* If this target does not decrement the PC after breakpoints, then we have nothing to do. */ regcache = get_thread_regcache (ecs->ptid);