From: Luke Kenneth Casson Leighton <lkcl@lkcl.net>
Date: Sun, 9 Aug 2020 18:47:27 +0000 (+0100)
Subject: use rising edge detection on st go_i/rel_o
X-Git-Tag: semi_working_ecp5~414
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=405fd8b72de9bed7c8fa29fd7f5c6a14131dea14;p=soc.git

use rising edge detection on st go_i/rel_o
---

diff --git a/src/soc/simple/issuer.py b/src/soc/simple/issuer.py
index 31bd5ab7..4e8a7f16 100644
--- a/src/soc/simple/issuer.py
+++ b/src/soc/simple/issuer.py
@@ -31,6 +31,8 @@ from soc.decoder.power_enums import MicrOp
 from soc.debug.dmi import CoreDebug, DMIInterface
 from soc.config.state import CoreState
 
+from nmutil.util import rising_edge
+
 
 class TestIssuer(Elaboratable):
     """TestIssuer - reads instructions from TestMemory and issues them
@@ -105,8 +107,9 @@ class TestIssuer(Elaboratable):
         # temporary hack: says "go" immediately for both address gen and ST
         l0 = core.l0
         ldst = core.fus.fus['ldst0']
+        st_go_edge = rising_edge(m, ldst.st.rel_o)
         m.d.comb += ldst.ad.go_i.eq(ldst.ad.rel_o) # link addr-go direct to rel
-        m.d.sync += ldst.st.go_i.eq(ldst.st.rel_o) # link store-go direct to rel
+        m.d.sync += ldst.st.go_i.eq(st_go_edge) # link store-go to rising rel
 
         # PC and instruction from I-Memory
         current_insn = Signal(32) # current fetched instruction (note sync)