From: Eric Anholt <eric@anholt.net>
Date: Fri, 27 Aug 2010 19:19:30 +0000 (-0700)
Subject: i965: Fix the maximum grf counting in the new FS backend.
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=40932c1752b0fa918d764e3367f5ab450033304a;p=mesa.git

i965: Fix the maximum grf counting in the new FS backend.

glsl-algebraic-rcp-rsq managed to use 33 registers, and we claimed to
only use 32, so the write to g32 would go stomping over the precious
g0 of some other thread.
---

diff --git a/src/mesa/drivers/dri/i965/brw_fs.cpp b/src/mesa/drivers/dri/i965/brw_fs.cpp
index f8b06226d79..673a31c1dd6 100644
--- a/src/mesa/drivers/dri/i965/brw_fs.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs.cpp
@@ -1357,7 +1357,7 @@ fs_visitor::assign_regs()
       last_grf = MAX2(last_grf, inst->src[1].hw_reg);
    }
 
-   this->grf_used = last_grf;
+   this->grf_used = last_grf + 1;
 }
 
 static struct brw_reg brw_reg_from_fs_reg(fs_reg *reg)