From: Alan Modra Date: Wed, 12 Jan 2005 12:22:25 +0000 (+0000) Subject: re PR target/19389 (Odd gpr mem load unrecognizable insn) X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=409f61cd325af79b30cf0d9862643cb265c961f1;p=gcc.git re PR target/19389 (Odd gpr mem load unrecognizable insn) PR target/19389 * config/rs6000/rs6000.md (movtf_internal): Replace r->o and m->r with r->Y and Y->r. From-SVN: r93224 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d30899341f0..d666e251328 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2005-01-12 Alan Modra + + PR target/19389 + * config/rs6000/rs6000.md (movtf_internal): Replace r->o and m->r + with r->Y and Y->r. + 2005-01-12 Nick Clifton * config/iq2000/iq2000.h (ASM_SPEC): Undefine (to stop -Qy being diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index c5b1dcdf21f..e3ba0211a78 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -1,6 +1,6 @@ ;; Machine description for IBM RISC System 6000 (POWER) for GNU C compiler ;; Copyright (C) 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, -;; 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. +;; 1999, 2000, 2001, 2002, 2003, 2004, 2005 Free Software Foundation, Inc. ;; Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu) ;; This file is part of GCC. @@ -8234,10 +8234,10 @@ ; It's important to list the o->f and f->o moves before f->f because ; otherwise reload, given m->f, will try to pick f->f and reload it, -; which doesn't make progress. Likewise r->o<> must be before r->r. +; which doesn't make progress. Likewise r->Y must be before r->r. (define_insn_and_split "*movtf_internal" - [(set (match_operand:TF 0 "nonimmediate_operand" "=o,f,f,r,o<>,r") - (match_operand:TF 1 "input_operand" "f,o,f,mGHF,r,r"))] + [(set (match_operand:TF 0 "nonimmediate_operand" "=o,f,f,r,Y,r") + (match_operand:TF 1 "input_operand" "f,o,f,YGHF,r,r"))] "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN) && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128 && (gpc_reg_operand (operands[0], TFmode)