From: Andrey Miroshnikov <andrey@technepisteme.xyz>
Date: Wed, 6 Jul 2022 16:10:12 +0000 (+0100)
Subject: Fixed some more spec links
X-Git-Tag: opf_rfc_ls005_v1~1314
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=40b9a4f12b0be3cc82de24f8dc1957922128a260;p=libreriscv.git

Fixed some more spec links
---

diff --git a/openpower/pandoc_img.py b/openpower/pandoc_img.py
index 8ff61c9b7..6dc1f49cf 100755
--- a/openpower/pandoc_img.py
+++ b/openpower/pandoc_img.py
@@ -72,18 +72,22 @@ def inlinenotes(k, v, f, meta):
                    'sv/mv.swizzle': 'Swizzle Move',
                    'sv/mv.vec': 'Pack / Unpack',
                    'svp64/appendix': 'SVP64 Appendix',
+                   'sv/svp64/appendix': 'SVP64 Appendix',
                    'sv/svp64_quirks': 'SVP64 Quirks',
                    'openpower/isa/simplev': 'Simple-V pseudocode',
                    'opcode_regs_deduped': 'SVP64 Augmentation Table',
                    'sv/av_opcodes' : 'Audio and Video Opcodes',
+                   'av_opcodes' : 'Audio and Video Opcodes',
                    'sv/vector_ops' : 'SV Vector ops',
                    'sv/int_fp_mv' : 'FP/Int Conversion ops',
                    'sv/bitmanip' : 'Bitmanip ops',
                    'sv/cr_int_predication' : 'CR Weird ops',
+                   'cr_int_predication' : 'CR Weird ops',
                    'sv/fclass' : 'FP Class ops',
                    'sv/biginteger' : 'Big Integer',
                    'isa/svfparith' : 'Floating Point pseudocode',
                    'isa/svfixedarith' : 'Fixed Point pseudocode',
+                   'openpower/isa/branch' : 'Branch pseudocode',
                   }
         if link in lookups:
             out.write("     found %s\n" % lookups[link])
diff --git a/openpower/simple_v_spec.tex b/openpower/simple_v_spec.tex
index 7d25bc789..a5908ec2a 100644
--- a/openpower/simple_v_spec.tex
+++ b/openpower/simple_v_spec.tex
@@ -192,6 +192,7 @@ Programme, requires full transparency.
 
 \begin{appendices}
 \chapter{SVP64 Appendix}\hypertarget{svp64ux2fappendix}{}
+\hypertarget{svux2fsvp64ux2fappendix}{}
 \input{tex_out/svp64_appendix.tex}
 \chapter{SVP64 Quirks}\hypertarget{svux2fsvp64_quirks}{}
 \input{tex_out/svp64_quirks.tex}
@@ -211,6 +212,7 @@ Programme, requires full transparency.
 \chapter{SV Vector ops}\hypertarget{svux2fvector_ops}{}
 \input{tex_out/vector_ops.tex}
 \chapter{CR Weird ops}\hypertarget{svux2fcr_int_predication}{}
+\hypertarget{cr_int_predication}{}
 \input{tex_out/cr_int_predication.tex}
 \chapter{Bitmanip ops}\hypertarget{svux2fbitmanip}{}
 \input{tex_out/bitmanip.tex}
@@ -219,6 +221,7 @@ Programme, requires full transparency.
 \chapter{FP Class ops}\hypertarget{svux2ffclass}{}
 \input{tex_out/fclass.tex}
 \chapter{Audio and Video Opcodes}\hypertarget{svux2fav_opcodes}{}
+\hypertarget{av_opcodes}{}
 \input{tex_out/av_opcodes.tex}
 \chapter{Big Integer}\hypertarget{svux2fbiginteger}{}
 \input{tex_out/big_integer.tex}
@@ -228,10 +231,10 @@ Programme, requires full transparency.
 \input{tex_out/big_integer_analysis.tex}
 \chapter{Bitmanip pseudocode}\hypertarget{svux2fpseudocode_bitmanip}{}
 \input{tex_out/pseudocode_bitmanip.tex}
-\chapter{Floating Point pseudocode}\hypertarget{svux2fpseudocode_svfparith}{}
+\chapter{Floating Point pseudocode}\hypertarget{isaux2fsvfparith}{}
 \input{tex_out/pseudocode_svfparith.tex}
 \chapter{Fixed Point pseudocode}
-\hypertarget{svux2fpseudocode_svfixedarith}{}
+\hypertarget{isaux2fsvfixedarith}{}
 \input{tex_out/pseudocode_svfixedarith.tex}
 \end{appendices}
 
@@ -263,6 +266,7 @@ to extend to 128-bit in future (like RV128).
 \hypertarget{svux2fpseudocode_bcd}{}
 \input{tex_out/pseudocode_bcd.tex}
 \chapter{Branch pseudocode}
+\hypertarget{openpowerux2fisaux2fbranch}{}
 \hypertarget{svux2fpseudocode_branch}{}
 \input{tex_out/pseudocode_branch.tex}
 \chapter{Fixed Point Compare pseudocode}