From: Oleg Endo <olegendo@gcc.gnu.org>
Date: Thu, 25 Jun 2015 23:12:07 +0000 (+0000)
Subject: re PR target/65979 ([SH] Wrong code is generated with stage1 compiler)
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=411be49d64b9be1b24a3925c5b245af0d876cffa;p=gcc.git

re PR target/65979 ([SH] Wrong code is generated with stage1 compiler)

gcc/
	PR target/65979
	PR target/66611
	* config/sh/sh.md (tstsi_t peephole2): Use insn_invalid_p to check if
	the replacement insn will work.

From-SVN: r224988
---

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2ca60430fc9..0a9c6b1086d 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,10 @@
+2015-06-25  Oleg Endo  <olegendo@gcc.gnu.org>
+
+	PR target/65979
+	PR target/66611
+	* config/sh/sh.md (tstsi_t peephole2): Use insn_invalid_p to check if
+	the replacement insn will work.
+
 2015-06-25  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* gcc.c (driver_handle_option): Validate -pie if PIE is enabled
diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md
index 43cd949d2d0..35113c092c0 100644
--- a/gcc/config/sh/sh.md
+++ b/gcc/config/sh/sh.md
@@ -14733,8 +14733,19 @@ label:
   if (REGNO (operands[1]) == REGNO (operands[2]))
       operands[2] = gen_rtx_REG (SImode, REGNO (operands[0]));
 
-  sh_check_add_incdec_notes (emit_insn (gen_rtx_SET (operands[2],
-						     operands[3])));
+  // We don't know what the new set insn will be in detail.  Just make sure
+  // that it still can be recognized and the constraints are satisfied.
+  rtx_insn* i = emit_insn (gen_rtx_SET (operands[2], operands[3]));
+						     
+  recog_data_d prev_recog_data = recog_data;
+  bool i_invalid = insn_invalid_p (i, false); 
+  recog_data = prev_recog_data;
+  
+  if (i_invalid)
+    FAIL;
+    
+  sh_check_add_incdec_notes (i);
+
   emit_insn (gen_tstsi_t (operands[2],
 			  gen_rtx_REG (SImode, (REGNO (operands[1])))));
 })
@@ -14761,8 +14772,19 @@ label:
        || REGNO (operands[2]) == REGNO (operands[5]))"
   [(const_int 0)]
 {
-  sh_check_add_incdec_notes (emit_insn (gen_rtx_SET (operands[2],
-						     operands[3])));
+  // We don't know what the new set insn will be in detail.  Just make sure
+  // that it still can be recognized and the constraints are satisfied.
+  rtx_insn* i = emit_insn (gen_rtx_SET (operands[2], operands[3]));
+
+  recog_data_d prev_recog_data = recog_data;
+  bool i_invalid = insn_invalid_p (i, false); 
+  recog_data = prev_recog_data;
+  
+  if (i_invalid)
+    FAIL;
+    
+  sh_check_add_incdec_notes (i);
+  
   emit_insn (gen_tstsi_t (operands[2],
 			  gen_rtx_REG (SImode, (REGNO (operands[1])))));
 })