From: Nathan Binkert <binkertn@umich.edu>
Date: Mon, 9 Feb 2004 14:06:20 +0000 (-0500)
Subject: Add that one IPR memory space address that we keep seeing
X-Git-Tag: m5_1.0_beta2~158^2
X-Git-Url: https://git.libre-soc.org/?a=commitdiff_plain;h=411d5497fa2bd28c9cf4ac1fccf806ee8a1ff33d;p=gem5.git

Add that one IPR memory space address that we keep seeing

--HG--
extra : convert_revision : 81b365ac9ca8b33cae99107e5b1900f7c46f0866
---

diff --git a/arch/alpha/alpha_memory.cc b/arch/alpha/alpha_memory.cc
index 0f9ad2cfc..00e97250f 100644
--- a/arch/alpha/alpha_memory.cc
+++ b/arch/alpha/alpha_memory.cc
@@ -90,8 +90,17 @@ AlphaTlb::checkCacheability(MemReqPtr &req)
     if (req->paddr & PA_UNCACHED_BIT) {
         if (PA_IPR_SPACE(req->paddr)) {
             // IPR memory space not implemented
-            if (!req->xc->misspeculating())
-                panic("IPR memory space not implemented! PA=%x\n", req->paddr);
+            if (!req->xc->misspeculating()) {
+                switch (req->paddr) {
+                  case 0xFFFFF00188:
+                    req->data = 0;
+                    break;
+
+                  default:
+                    panic("IPR memory space not implemented! PA=%x\n",
+                          req->paddr);
+                }
+            }
         } else {
             // mark request as uncacheable
             req->flags |= UNCACHEABLE;